mirror of https://github.com/proxmox/mirror_qemu
7a1dc45af5
* Fix VNCR fault detection logic * Fix A64 scalar SQSHRN and SQRSHRN * Fix incorrect aa64_tidcp1 feature check * hw/arm/virt.c: Remove newline from error_report() string * hw/arm/musicpal: Convert to qemu_add_kbd_event_handler() * hw/arm/allwinner-a10: Unconditionally map the USB Host controllers * hw/arm/nseries: Unconditionally map the TUSB6010 USB Host controller * hw/arm: Add EHCI/OHCI controllers to Allwinner R40 and Bananapi board * hw/arm: Add AHCI/SATA controller to Allwinner R40 and Bananapi board * hw/arm: Add watchdog timer to Allwinner H40 and Bananapi board * arm: various include header cleanups * cleanups to allow some files to be built only once * fsl-imx6ul: Add various missing unimplemented devices * docs/system/arm/virt.rst: Add note on CPU features off by default * hw/char/imx_serial: Implement receive FIFO and ageing timer * target/xtensa: fix OOB TLB entry access * bswap.h: Fix const_le64() macro * hw/arm: add PCIe to Freescale i.MX6 -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmWzwpsZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3oTVD/4jM7ttKlXxtWsJ/cKDL5Im uMmDECPrdK2qaNpONfV/YC3WadM6bSgB8OQd2YlI67DLgl3Hfaa+GnQsZhEgZ3lC VECOTg5OKwwJY+Ac86t1GJa483wDEQ6NL08oLN94n9Ub/9G0S3oWpmE4bgof7PzW rbLDDpKP+W5NfkqMfA5piV7N6mFHvg9wqFX//quqySIiu8NesKV9LmlP/FyNDU/s 8ZeSqo/tq/IHr9IeYUtOoxVwYUOPuNKwD+vwy1taiXgjvVtq2URrCrlc4+KCWJsj VUBSXdY2boqK31KFZ9NP9kJhIS5gmzgnK8YrHX6sgSbh+IybZUv+y/4eSO/LDYIi r2VQF6oTtkmcIxUqAI6ZAehzZUIrB22QItUN8rg0slKBM8e/xHYaEBY8APKCLcvE h59DLq1rPZG3Aie/h3/RjTfT2kI83PiE1mDGbhKf9G8UfXHEH8Eabd0g66UWfzlK 67o7bwwzwXgoGk2hgMY/yobB3pF5YCly/a3aN/aLEj387y8sNaT1ASR9LETj7TC3 xOhn5f8G6OFKMVI3K8Sco8ILP15LELprAW2keL4jn+4y3Hfq5yC984yOSnlM0wug wWRvEr7U1ZiEbDaOvoa0beuYpeq1sm4OZ5yGJxGy3IuQ8pZpkHVTrBxw/NCNQnos fK5czVTGqvvmPXgPsQQm1A== =vYTy -----END PGP SIGNATURE----- Merge tag 'pull-target-arm-20240126' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * Fix VNCR fault detection logic * Fix A64 scalar SQSHRN and SQRSHRN * Fix incorrect aa64_tidcp1 feature check * hw/arm/virt.c: Remove newline from error_report() string * hw/arm/musicpal: Convert to qemu_add_kbd_event_handler() * hw/arm/allwinner-a10: Unconditionally map the USB Host controllers * hw/arm/nseries: Unconditionally map the TUSB6010 USB Host controller * hw/arm: Add EHCI/OHCI controllers to Allwinner R40 and Bananapi board * hw/arm: Add AHCI/SATA controller to Allwinner R40 and Bananapi board * hw/arm: Add watchdog timer to Allwinner H40 and Bananapi board * arm: various include header cleanups * cleanups to allow some files to be built only once * fsl-imx6ul: Add various missing unimplemented devices * docs/system/arm/virt.rst: Add note on CPU features off by default * hw/char/imx_serial: Implement receive FIFO and ageing timer * target/xtensa: fix OOB TLB entry access * bswap.h: Fix const_le64() macro * hw/arm: add PCIe to Freescale i.MX6 # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmWzwpsZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3oTVD/4jM7ttKlXxtWsJ/cKDL5Im # uMmDECPrdK2qaNpONfV/YC3WadM6bSgB8OQd2YlI67DLgl3Hfaa+GnQsZhEgZ3lC # VECOTg5OKwwJY+Ac86t1GJa483wDEQ6NL08oLN94n9Ub/9G0S3oWpmE4bgof7PzW # rbLDDpKP+W5NfkqMfA5piV7N6mFHvg9wqFX//quqySIiu8NesKV9LmlP/FyNDU/s # 8ZeSqo/tq/IHr9IeYUtOoxVwYUOPuNKwD+vwy1taiXgjvVtq2URrCrlc4+KCWJsj # VUBSXdY2boqK31KFZ9NP9kJhIS5gmzgnK8YrHX6sgSbh+IybZUv+y/4eSO/LDYIi # r2VQF6oTtkmcIxUqAI6ZAehzZUIrB22QItUN8rg0slKBM8e/xHYaEBY8APKCLcvE # h59DLq1rPZG3Aie/h3/RjTfT2kI83PiE1mDGbhKf9G8UfXHEH8Eabd0g66UWfzlK # 67o7bwwzwXgoGk2hgMY/yobB3pF5YCly/a3aN/aLEj387y8sNaT1ASR9LETj7TC3 # xOhn5f8G6OFKMVI3K8Sco8ILP15LELprAW2keL4jn+4y3Hfq5yC984yOSnlM0wug # wWRvEr7U1ZiEbDaOvoa0beuYpeq1sm4OZ5yGJxGy3IuQ8pZpkHVTrBxw/NCNQnos # fK5czVTGqvvmPXgPsQQm1A== # =vYTy # -----END PGP SIGNATURE----- # gpg: Signature made Fri 26 Jan 2024 14:32:59 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20240126' of https://git.linaro.org/people/pmaydell/qemu-arm: (36 commits) hw/arm: add PCIe to Freescale i.MX6 target/arm: Fix incorrect aa64_tidcp1 feature check bswap.h: Fix const_le64() macro target/arm: Fix A64 scalar SQSHRN and SQRSHRN hw/char/imx_serial: Implement receive FIFO and ageing timer docs/system/arm/virt.rst: Add note on CPU features off by default fsl-imx6ul: Add various missing unimplemented devices hw/arm: Build various units only once target/arm: Move GTimer definitions to new 'gtimer.h' header target/arm: Move e2h_access() helper around target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header hw/arm/armv7m: Make 'hw/intc/armv7m_nvic.h' a target agnostic header target/arm: Expose M-profile register bank index definitions hw/misc/xlnx-versal-crl: Build it only once hw/misc/xlnx-versal-crl: Include generic 'cpu-qom.h' instead of 'cpu.h' hw/cpu/a9mpcore: Build it only once target/arm: Declare ARM_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h' target/arm: Expose arm_cpu_mp_affinity() in 'multiprocessing.h' header target/arm: Create arm_cpu_mp_affinity target/arm: Rename arm_cpu_mp_affinity ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
||
|---|---|---|
| .. | ||
| authz | ||
| block | ||
| chardev | ||
| crypto | ||
| disas | ||
| exec | ||
| fpu | ||
| gdbstub | ||
| hw | ||
| io | ||
| libdecnumber | ||
| migration | ||
| monitor | ||
| net | ||
| qapi | ||
| qemu | ||
| qom | ||
| scsi | ||
| semihosting | ||
| standard-headers | ||
| sysemu | ||
| tcg | ||
| ui | ||
| user | ||
| elf.h | ||
| glib-compat.h | ||
| qemu-io.h | ||
| qemu-main.h | ||