mirror of https://github.com/proxmox/mirror_qemu
619 lines
11 KiB
C
619 lines
11 KiB
C
/*
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* i386 micro operations
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#define ASM_SOFTMMU
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#include "exec.h"
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/* we define the various pieces of code used by the JIT */
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#define REG EAX
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#define REGNAME _EAX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ECX
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#define REGNAME _ECX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDX
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#define REGNAME _EDX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBX
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#define REGNAME _EBX
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESP
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#define REGNAME _ESP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EBP
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#define REGNAME _EBP
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG ESI
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#define REGNAME _ESI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG EDI
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#define REGNAME _EDI
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#ifdef TARGET_X86_64
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#define REG (env->regs[8])
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#define REGNAME _R8
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[9])
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#define REGNAME _R9
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[10])
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#define REGNAME _R10
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[11])
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#define REGNAME _R11
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[12])
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#define REGNAME _R12
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[13])
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#define REGNAME _R13
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[14])
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#define REGNAME _R14
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#define REG (env->regs[15])
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#define REGNAME _R15
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#include "opreg_template.h"
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#undef REG
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#undef REGNAME
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#endif
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/* multiply/divide */
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/* XXX: add eflags optimizations */
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/* XXX: add non P4 style flags */
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void OPPROTO op_mulb_AL_T0(void)
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{
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unsigned int res;
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res = (uint8_t)EAX * (uint8_t)T0;
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EAX = (EAX & ~0xffff) | res;
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CC_DST = res;
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CC_SRC = (res & 0xff00);
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}
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void OPPROTO op_imulb_AL_T0(void)
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{
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int res;
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res = (int8_t)EAX * (int8_t)T0;
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EAX = (EAX & ~0xffff) | (res & 0xffff);
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CC_DST = res;
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CC_SRC = (res != (int8_t)res);
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}
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void OPPROTO op_mulw_AX_T0(void)
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{
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unsigned int res;
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res = (uint16_t)EAX * (uint16_t)T0;
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EAX = (EAX & ~0xffff) | (res & 0xffff);
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EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
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CC_DST = res;
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CC_SRC = res >> 16;
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}
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void OPPROTO op_imulw_AX_T0(void)
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{
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int res;
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res = (int16_t)EAX * (int16_t)T0;
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EAX = (EAX & ~0xffff) | (res & 0xffff);
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EDX = (EDX & ~0xffff) | ((res >> 16) & 0xffff);
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CC_DST = res;
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CC_SRC = (res != (int16_t)res);
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}
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void OPPROTO op_mull_EAX_T0(void)
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{
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uint64_t res;
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res = (uint64_t)((uint32_t)EAX) * (uint64_t)((uint32_t)T0);
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EAX = (uint32_t)res;
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EDX = (uint32_t)(res >> 32);
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CC_DST = (uint32_t)res;
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CC_SRC = (uint32_t)(res >> 32);
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}
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void OPPROTO op_imull_EAX_T0(void)
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{
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int64_t res;
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res = (int64_t)((int32_t)EAX) * (int64_t)((int32_t)T0);
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EAX = (uint32_t)(res);
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EDX = (uint32_t)(res >> 32);
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CC_DST = res;
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CC_SRC = (res != (int32_t)res);
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}
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void OPPROTO op_imulw_T0_T1(void)
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{
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int res;
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res = (int16_t)T0 * (int16_t)T1;
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T0 = res;
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CC_DST = res;
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CC_SRC = (res != (int16_t)res);
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}
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void OPPROTO op_imull_T0_T1(void)
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{
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int64_t res;
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res = (int64_t)((int32_t)T0) * (int64_t)((int32_t)T1);
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T0 = res;
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CC_DST = res;
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CC_SRC = (res != (int32_t)res);
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}
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#ifdef TARGET_X86_64
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void OPPROTO op_mulq_EAX_T0(void)
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{
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helper_mulq_EAX_T0(T0);
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}
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void OPPROTO op_imulq_EAX_T0(void)
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{
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helper_imulq_EAX_T0(T0);
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}
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void OPPROTO op_imulq_T0_T1(void)
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{
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T0 = helper_imulq_T0_T1(T0, T1);
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}
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#endif
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/* constant load & misc op */
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/* XXX: consistent names */
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void OPPROTO op_into(void)
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all();
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if (eflags & CC_O) {
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raise_interrupt(EXCP04_INTO, 1, 0, PARAM1);
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}
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FORCE_RET();
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}
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void OPPROTO op_cmpxchg8b(void)
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{
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helper_cmpxchg8b(A0);
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}
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/* multiple size ops */
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#define ldul ldl
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#define SHIFT 0
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#include "ops_template.h"
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#undef SHIFT
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#define SHIFT 1
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#include "ops_template.h"
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#undef SHIFT
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#define SHIFT 2
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#include "ops_template.h"
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#undef SHIFT
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#ifdef TARGET_X86_64
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#define SHIFT 3
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#include "ops_template.h"
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#undef SHIFT
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#endif
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/* bcd */
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void OPPROTO op_aam(void)
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{
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helper_aam(PARAM1);
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}
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void OPPROTO op_aad(void)
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{
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helper_aad(PARAM1);
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}
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void OPPROTO op_aaa(void)
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{
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helper_aaa();
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}
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void OPPROTO op_aas(void)
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{
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helper_aas();
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}
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void OPPROTO op_daa(void)
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{
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helper_daa();
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}
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void OPPROTO op_das(void)
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{
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helper_das();
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}
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/* segment handling */
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/* faster VM86 version */
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void OPPROTO op_movl_seg_T0_vm(void)
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{
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int selector;
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SegmentCache *sc;
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selector = T0 & 0xffff;
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/* env->segs[] access */
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sc = (SegmentCache *)((char *)env + PARAM1);
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sc->selector = selector;
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sc->base = (selector << 4);
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}
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void OPPROTO op_movl_T0_seg(void)
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{
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T0 = env->segs[PARAM1].selector;
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}
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void OPPROTO op_lsl(void)
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{
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uint32_t val;
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val = helper_lsl(T0);
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if (CC_SRC & CC_Z)
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T1 = val;
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FORCE_RET();
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}
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void OPPROTO op_lar(void)
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{
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uint32_t val;
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val = helper_lar(T0);
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if (CC_SRC & CC_Z)
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T1 = val;
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FORCE_RET();
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}
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void OPPROTO op_verr(void)
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{
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helper_verr(T0);
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}
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void OPPROTO op_verw(void)
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{
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helper_verw(T0);
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}
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void OPPROTO op_arpl(void)
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{
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if ((T0 & 3) < (T1 & 3)) {
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/* XXX: emulate bug or 0xff3f0000 oring as in bochs ? */
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T0 = (T0 & ~3) | (T1 & 3);
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T1 = CC_Z;
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} else {
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T1 = 0;
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}
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FORCE_RET();
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}
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void OPPROTO op_arpl_update(void)
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all();
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CC_SRC = (eflags & ~CC_Z) | T1;
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}
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void OPPROTO op_movl_T0_env(void)
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{
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T0 = *(uint32_t *)((char *)env + PARAM1);
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}
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void OPPROTO op_movl_env_T0(void)
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{
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*(uint32_t *)((char *)env + PARAM1) = T0;
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}
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void OPPROTO op_movl_env_T1(void)
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{
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*(uint32_t *)((char *)env + PARAM1) = T1;
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}
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void OPPROTO op_movtl_T0_env(void)
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{
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T0 = *(target_ulong *)((char *)env + PARAM1);
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}
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void OPPROTO op_movtl_env_T0(void)
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{
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*(target_ulong *)((char *)env + PARAM1) = T0;
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}
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void OPPROTO op_movtl_T1_env(void)
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{
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T1 = *(target_ulong *)((char *)env + PARAM1);
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}
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void OPPROTO op_movtl_env_T1(void)
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{
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*(target_ulong *)((char *)env + PARAM1) = T1;
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}
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/* flags handling */
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void OPPROTO op_jmp_label(void)
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{
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GOTO_LABEL_PARAM(1);
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}
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void OPPROTO op_jnz_T0_label(void)
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{
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if (T0)
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GOTO_LABEL_PARAM(1);
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FORCE_RET();
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}
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/* slow set cases (compute x86 flags) */
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void OPPROTO op_seto_T0_cc(void)
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all();
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T0 = (eflags >> 11) & 1;
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}
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void OPPROTO op_setb_T0_cc(void)
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{
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T0 = cc_table[CC_OP].compute_c();
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}
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void OPPROTO op_setz_T0_cc(void)
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all();
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T0 = (eflags >> 6) & 1;
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}
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void OPPROTO op_setbe_T0_cc(void)
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all();
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T0 = (eflags & (CC_Z | CC_C)) != 0;
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}
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void OPPROTO op_sets_T0_cc(void)
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all();
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T0 = (eflags >> 7) & 1;
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}
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void OPPROTO op_setp_T0_cc(void)
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all();
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T0 = (eflags >> 2) & 1;
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}
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void OPPROTO op_setl_T0_cc(void)
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all();
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T0 = ((eflags ^ (eflags >> 4)) >> 7) & 1;
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}
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void OPPROTO op_setle_T0_cc(void)
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{
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int eflags;
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eflags = cc_table[CC_OP].compute_all();
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T0 = (((eflags ^ (eflags >> 4)) & 0x80) || (eflags & CC_Z)) != 0;
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}
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void OPPROTO op_xor_T0_1(void)
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{
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T0 ^= 1;
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}
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/* XXX: clear VIF/VIP in all ops ? */
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void OPPROTO op_movl_eflags_T0(void)
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{
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load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK));
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}
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void OPPROTO op_movw_eflags_T0(void)
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{
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load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK) & 0xffff);
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}
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void OPPROTO op_movl_eflags_T0_io(void)
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{
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load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK));
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}
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void OPPROTO op_movw_eflags_T0_io(void)
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{
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load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK) & 0xffff);
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}
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void OPPROTO op_movl_eflags_T0_cpl0(void)
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{
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load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK));
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}
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void OPPROTO op_movw_eflags_T0_cpl0(void)
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{
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load_eflags(T0, (TF_MASK | AC_MASK | ID_MASK | NT_MASK | IF_MASK | IOPL_MASK) & 0xffff);
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}
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#if 0
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/* vm86plus version */
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void OPPROTO op_movw_eflags_T0_vm(void)
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{
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int eflags;
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eflags = T0;
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CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
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DF = 1 - (2 * ((eflags >> 10) & 1));
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/* we also update some system flags as in user mode */
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env->eflags = (env->eflags & ~(FL_UPDATE_MASK16 | VIF_MASK)) |
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(eflags & FL_UPDATE_MASK16);
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if (eflags & IF_MASK) {
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env->eflags |= VIF_MASK;
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if (env->eflags & VIP_MASK) {
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EIP = PARAM1;
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raise_exception(EXCP0D_GPF);
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}
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}
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FORCE_RET();
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}
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void OPPROTO op_movl_eflags_T0_vm(void)
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{
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int eflags;
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eflags = T0;
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CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
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DF = 1 - (2 * ((eflags >> 10) & 1));
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/* we also update some system flags as in user mode */
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env->eflags = (env->eflags & ~(FL_UPDATE_MASK32 | VIF_MASK)) |
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(eflags & FL_UPDATE_MASK32);
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if (eflags & IF_MASK) {
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env->eflags |= VIF_MASK;
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if (env->eflags & VIP_MASK) {
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EIP = PARAM1;
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raise_exception(EXCP0D_GPF);
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}
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}
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FORCE_RET();
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}
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#endif
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/* XXX: compute only O flag */
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void OPPROTO op_movb_eflags_T0(void)
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{
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int of;
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of = cc_table[CC_OP].compute_all() & CC_O;
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CC_SRC = (T0 & (CC_S | CC_Z | CC_A | CC_P | CC_C)) | of;
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}
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void OPPROTO op_movl_T0_eflags(void)
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{
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int eflags;
|
|
eflags = cc_table[CC_OP].compute_all();
|
|
eflags |= (DF & DF_MASK);
|
|
eflags |= env->eflags & ~(VM_MASK | RF_MASK);
|
|
T0 = eflags;
|
|
}
|
|
|
|
/* vm86plus version */
|
|
#if 0
|
|
void OPPROTO op_movl_T0_eflags_vm(void)
|
|
{
|
|
int eflags;
|
|
eflags = cc_table[CC_OP].compute_all();
|
|
eflags |= (DF & DF_MASK);
|
|
eflags |= env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
|
|
if (env->eflags & VIF_MASK)
|
|
eflags |= IF_MASK;
|
|
T0 = eflags;
|
|
}
|
|
#endif
|
|
|
|
void OPPROTO op_clc(void)
|
|
{
|
|
int eflags;
|
|
eflags = cc_table[CC_OP].compute_all();
|
|
eflags &= ~CC_C;
|
|
CC_SRC = eflags;
|
|
}
|
|
|
|
void OPPROTO op_stc(void)
|
|
{
|
|
int eflags;
|
|
eflags = cc_table[CC_OP].compute_all();
|
|
eflags |= CC_C;
|
|
CC_SRC = eflags;
|
|
}
|
|
|
|
void OPPROTO op_cmc(void)
|
|
{
|
|
int eflags;
|
|
eflags = cc_table[CC_OP].compute_all();
|
|
eflags ^= CC_C;
|
|
CC_SRC = eflags;
|
|
}
|
|
|
|
void OPPROTO op_salc(void)
|
|
{
|
|
int cf;
|
|
cf = cc_table[CC_OP].compute_c();
|
|
EAX = (EAX & ~0xff) | ((-cf) & 0xff);
|
|
}
|
|
|
|
void OPPROTO op_fcomi_dummy(void)
|
|
{
|
|
T0 = 0;
|
|
}
|
|
|
|
/* SSE support */
|
|
void OPPROTO op_com_dummy(void)
|
|
{
|
|
T0 = 0;
|
|
}
|