mirror of https://github.com/proxmox/mirror_qemu
75da499733
In save_user_regs, there are two bugs where we OR in a bit number instead of the bit, clobbering the low bits of MSR. However: The MSR_VR and MSR_SPE bits control the availability of the insns. If the bits were not already set in MSR, then any attempt to access those registers would result in SIGILL. For linux-user, we always initialize MSR to the capabilities of the cpu. We *could* add checks vs MSR where we currently check insn_flags and insn_flags2, but we know they match. Also, there's a stray cut-and-paste comment in restore. Then, do not force little-endian binaries into big-endian mode. Finally, use ppc_store_msr for the update to affect hflags. Which is the reason none of these bugs were previously noticed. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20210323184340.619757-10-richard.henderson@linaro.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> |
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| .. | ||
| cpu_loop.c | ||
| meson.build | ||
| signal.c | ||
| sockbits.h | ||
| syscall.tbl | ||
| syscallhdr.sh | ||
| target_cpu.h | ||
| target_elf.h | ||
| target_fcntl.h | ||
| target_signal.h | ||
| target_structs.h | ||
| target_syscall.h | ||
| termbits.h | ||