mirror_qemu/hw/mem
Ira Weiny 617564bf92 hw/cxl/device: Add Flex Bus Port DVSEC
The Flex Bus Port DVSEC was missing on type 3 devices which was blocking
RAS checks.[1]

Add the Flex Bus Port DVSEC to type 3 devices as per CXL 3.0 8.2.1.3.

[1] https://lore.kernel.org/linux-cxl/167096738875.2861540.11815053323626849940.stgit@djiang5-desk3.ch.intel.com/

Cc: Dave Jiang <dave.jiang@intel.com>
Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Cc: Ben Widawsky <bwidawsk@kernel.org>
Cc: qemu-devel@nongnu.org
Cc: linux-cxl@vger.kernel.org
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Message-Id: <20221213-ira-flexbus-port-v2-1-eaa48d0e0700@intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2022-12-21 07:32:24 -05:00
..
Kconfig hw/cxl/device: Add a memory device (8.2.8.5) 2022-05-13 06:13:36 -04:00
cxl_type3.c hw/cxl/device: Add Flex Bus Port DVSEC 2022-12-21 07:32:24 -05:00
memory-device.c qapi: More complex uses of QAPI_LIST_APPEND 2021-01-28 08:08:45 +01:00
meson.build hw/cxl/device: Add a memory device (8.2.8.5) 2022-05-13 06:13:36 -04:00
npcm7xx_mc.c hw/*: Use type casting for SysBusDevice in NPCM7XX 2021-01-12 21:19:02 +00:00
nvdimm.c hw/mem/nvdimm: fix error message for 'unarmed' flag 2022-10-24 12:38:38 +02:00
pc-dimm.c qapi machine: Elide redundant has_FOO in generated C 2022-12-14 20:04:47 +01:00
sparse-mem.c Do not include exec/address-spaces.h if it's not really necessary 2021-05-02 17:24:51 +02:00
trace-events docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00