mirror_qemu/target/mips
Aleksandar Markovic 373ecd3823 target/mips: Fix decoding of ALIGN and DALIGN instructions
Opcode for ALIGN and DALIGN must be in fact ranges of opcodes, to
allow paremeter 'bp' to occupy two and three bits, respectively.

Reviewed-by: Stefan Markovic <smarkovic@wavecomp.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
2018-10-24 15:20:32 +02:00
..
Makefile.objs mips: move hw/mips/cputimer.c to target/mips/ 2017-09-21 13:24:34 +01:00
TODO
cp0_timer.c mips: introduce internal.h and cleanup cpu.h 2017-09-21 13:24:34 +01:00
cpu-qom.h mips: MIPSCPU model subclasses 2017-09-21 13:25:30 +01:00
cpu.c qdev: use device_class_set_parent_realize/unrealize/reset() 2018-02-05 13:54:38 +01:00
cpu.h target/mips: Add CP0 PWCtl register 2018-10-18 20:37:20 +02:00
dsp_helper.c Remove unnecessary variables for function return value 2018-05-20 08:48:13 +03:00
gdbstub.c target/mips: Fix gdbstub to read/write 64 bit FP registers 2018-06-27 20:13:50 +02:00
helper.c target/mips: Implement hardware page table walker for MIPS32 2018-10-18 20:37:20 +02:00
helper.h target/mips: Add CP0 PWCtl register 2018-10-18 20:37:20 +02:00
internal.h target/mips: Implement hardware page table walker for MIPS32 2018-10-18 20:37:20 +02:00
kvm.c mips: introduce internal.h and cleanup cpu.h 2017-09-21 13:24:34 +01:00
kvm_mips.h
lmi_helper.c
machine.c target/mips: Add CP0 PWCtl register 2018-10-18 20:37:20 +02:00
mips-defs.h target/mips: Define R5900 ISA, MMI ASE, and R5900 CPU preprocessor constants 2018-10-24 15:07:42 +02:00
mips-semi.c
msa_helper.c target/mips: Remove floatX_maybe_silence_nan from conversions 2018-05-17 15:27:15 -07:00
op_helper.c target/mips: Implement hardware page table walker for MIPS32 2018-10-18 20:37:20 +02:00
trace-events docs: fix broken paths to docs/devel/tracing.txt 2017-07-31 13:12:53 +03:00
translate.c target/mips: Fix decoding of ALIGN and DALIGN instructions 2018-10-24 15:20:32 +02:00
translate_init.inc.c target/mips: Define the R5900 CPU 2018-10-24 15:20:31 +02:00