mirror_qemu/target
Peter Maydell 657ee88ef3 target-arm queue:
* gdbstub: Correct misparsing of vCont C/S requests
  * openrisc: Move pic_cpu code into CPU object proper
  * nios2: Move IIC code into CPU object proper
  * Improve reporting of ROM overlap errors
  * xlnx-versal: Add USB support
  * hw/misc/zynq_slcr: Avoid #DIV/0! error
  * Numonyx: Fix dummy cycles and check for SPI mode on cmds
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201215' into staging

target-arm queue:
 * gdbstub: Correct misparsing of vCont C/S requests
 * openrisc: Move pic_cpu code into CPU object proper
 * nios2: Move IIC code into CPU object proper
 * Improve reporting of ROM overlap errors
 * xlnx-versal: Add USB support
 * hw/misc/zynq_slcr: Avoid #DIV/0! error
 * Numonyx: Fix dummy cycles and check for SPI mode on cmds

# gpg: Signature made Tue 15 Dec 2020 13:59:46 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20201215:
  hw/block/m25p80: Fix Numonyx fast read dummy cycle count
  hw/block/m25p80: Check SPI mode before running some Numonyx commands
  hw/block/m25p80: Fix when VCFG XIP bit is set for Numonyx
  hw/block/m25p80: Make Numonyx config field names more accurate
  hw/misc/zynq_slcr: Avoid #DIV/0! error
  arm: xlnx-versal: Connect usb to virt-versal
  usb: xlnx-usb-subsystem: Add xilinx usb subsystem
  usb: Add DWC3 model
  usb: Add versal-usb2-ctrl-regs module
  elf_ops.h: Be more verbose with ROM blob names
  elf_ops.h: Don't truncate name of the ROM blobs we create
  hw/core/loader.c: Improve reporting of ROM overlap errors
  hw/core/loader.c: Track last-seen ROM in rom_check_and_register_reset()
  target/nios2: Use deposit32() to update ipending register
  target/nios2: Move nios2_check_interrupts() into target/nios2
  target/nios2: Move IIC code into CPU object proper
  target/openrisc: Move pic_cpu code into CPU object proper
  hw/openrisc/openrisc_sim: Abstract out "get IRQ x of CPU y"
  hw/openrisc/openrisc_sim: Use IRQ splitter when connecting IRQ to multiple CPUs
  gdbstub: Correct misparsing of vCont C/S requests

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-12-15 16:58:27 +00:00
..
alpha overall/alpha tcg cpus|hppa: Fix Lesser GPL version number 2020-11-15 16:43:54 +01:00
arm arm/cpu64: Register "aarch64" as class property 2020-12-15 10:02:07 -05:00
avr qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
cris cris tcg cpus: Fix Lesser GPL version number 2020-11-15 16:39:05 +01:00
hppa overall/alpha tcg cpus|hppa: Fix Lesser GPL version number 2020-11-15 16:43:54 +01:00
i386 Machine queue, 2020-12-15 2020-12-15 15:35:47 +00:00
lm32 nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
m68k m68k: fix some comment spelling errors 2020-12-12 18:12:43 +01:00
microblaze target/microblaze: Fix possible array out of bounds in mmu_write() 2020-11-17 09:45:24 +01:00
mips target/mips: Use FloatRoundMode enum for FCR31 modes conversion 2020-12-13 20:27:11 +01:00
moxie qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
nios2 target/nios2: Use deposit32() to update ipending register 2020-12-15 12:04:30 +00:00
openrisc target/openrisc: Move pic_cpu code into CPU object proper 2020-12-15 12:04:30 +00:00
ppc target/ppc: Introduce an mmu_is_64bit() helper 2020-12-14 15:54:12 +11:00
riscv hmp: Pass monitor to mon_get_cpu_env() 2020-11-13 12:45:51 +00:00
rx target/rx: Fix Lesser GPL version number 2020-10-27 00:22:56 +01:00
s390x First set of 6.0 patches for s390x: 2020-12-11 22:22:50 +00:00
sh4 hmp: Pass monitor to mon_get_cpu_env() 2020-11-13 12:45:51 +00:00
sparc sparc: Check dev->realized at sparc_set_nwindows() 2020-12-15 10:02:07 -05:00
tilegx nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
tricore tricore tcg cpus: Fix Lesser GPL version number 2020-11-15 16:40:30 +01:00
unicore32 qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
xtensa xtensa tcg cpus: Fix Lesser GPL version number 2020-11-15 16:40:15 +01:00
meson.build meson: target 2020-08-21 06:30:35 -04:00