mirror_qemu/target/ppc
Philippe Mathieu-Daudé 744c72a837 cpu: Rename CPUClass vmsd -> legacy_vmsd
Quoting Peter Maydell [*]:

  There are two ways to handle migration for
  a CPU object:

  (1) like any other device, so it has a dc->vmsd that covers
  migration for the whole object. As usual for objects that are a
  subclass of a parent that has state, the first entry in the
  VMStateDescription field list is VMSTATE_CPU(), which migrates
  the cpu_common fields, followed by whatever the CPU's own migration
  fields are.

  (2) a backwards-compatible mechanism for CPUs that were
  originally migrated using manual "write fields to the migration
  stream structures". The on-the-wire migration format
  for those is based on the 'env' pointer (which isn't a QOM object),
  and the cpu_common part of the migration data is elsewhere.

  cpu_exec_realizefn() handles both possibilities:

  * for type 1, dc->vmsd is set and cc->vmsd is not,
    so cpu_exec_realizefn() does nothing, and the standard
    "register dc->vmsd for a device" code does everything needed

  * for type 2, dc->vmsd is NULL and so we register the
    vmstate_cpu_common directly to handle the cpu-common fields,
    and the cc->vmsd to handle the per-CPU stuff

  You can't change a CPU from one type to the other without breaking
  migration compatibility, which is why some guest architectures
  are stuck on the cc->vmsd form. New targets should use dc->vmsd.

To avoid new targets to start using type (2), rename cc->vmsd as
cc->legacy_vmsd. The correct field to implement is dc->vmsd (the
DeviceClass one).

See also commit b170fce3dd ("cpu: Register VMStateDescription
through CPUState") for historic background.

[*] https://www.mail-archive.com/qemu-devel@nongnu.org/msg800849.html

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210517105140.1062037-13-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-05-26 15:33:59 -07:00
..
translate target/ppc: Fix load endianness for lxvwsx/lxvdsx 2021-05-19 10:44:04 +10:00
arch_dump.c target/ppc: created ppc_{store,get}_vscr for generic vscr usage 2021-05-19 10:30:28 +10:00
compat.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
cpu-models.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
cpu-models.h powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h target/ppc: Add POWER10 exception model 2021-05-04 13:12:46 +10:00
cpu.c target/ppc: moved ppc_store_sdr1 to cpu.c 2021-05-19 10:30:28 +10:00
cpu.h target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN 2021-05-19 10:30:29 +10:00
cpu_init.c cpu: Rename CPUClass vmsd -> legacy_vmsd 2021-05-26 15:33:59 -07:00
dfp_helper.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
excp_helper.c target/ppc: Add POWER10 exception model 2021-05-04 13:12:46 +10:00
fpu_helper.c ppc/translate: Raise exceptions after setting the cc 2020-12-14 15:53:59 +11:00
gdbstub.c target/ppc: created ppc_{store,get}_vscr for generic vscr usage 2021-05-19 10:30:28 +10:00
helper.h target/ppc: Mark helper_raise_exception* as noreturn 2021-05-19 10:30:29 +10:00
helper_regs.c target/ppc: Validate hflags with CONFIG_DEBUG_TCG 2021-05-04 11:41:25 +10:00
helper_regs.h target/ppc: Remove env->immu_idx and env->dmmu_idx 2021-05-04 11:41:25 +10:00
int_helper.c target/ppc: created ppc_{store,get}_vscr for generic vscr usage 2021-05-19 10:30:28 +10:00
internal.h target/ppc: Introduce prot_for_access_type 2021-05-19 12:50:47 +10:00
kvm-stub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
kvm.c target/ppc/kvm: Cache timebase frequency 2021-03-31 11:10:50 +11:00
kvm_ppc.h spapr: Add PEF based confidential guest support 2021-02-08 16:57:38 +11:00
machine.c target/ppc: updated vscr manipulation in machine.c 2021-05-19 10:30:28 +10:00
mem_helper.c target/ppc: Remove env->immu_idx and env->dmmu_idx 2021-05-04 11:41:25 +10:00
meson.build target/ppc: isolated cpu init from translation logic 2021-05-19 10:30:28 +10:00
mfrom_table.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
mfrom_table_gen.c target/ppc: Style fixes for mfrom_table.inc.c & mfrom_table_gen.c 2019-04-26 10:42:38 +10:00
misc_helper.c target/ppc: moved ppc_store_lpcr to misc_helper.c 2021-05-19 10:30:28 +10:00
mmu-book3s-v3.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
mmu-book3s-v3.h powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
mmu-hash32.c target/ppc: Use MMUAccessType in mmu-hash32.c 2021-05-19 12:50:47 +10:00
mmu-hash32.h target/ppc: Manage external HPT via virtual hypervisor 2017-03-01 11:23:39 +11:00
mmu-hash64.c target/ppc: Use MMUAccessType in mmu-hash64.c 2021-05-19 12:50:47 +10:00
mmu-hash64.h target/ppc: moved ppc_store_lpcr to misc_helper.c 2021-05-19 10:30:28 +10:00
mmu-radix64.c target/ppc: Use MMUAccessType in mmu-radix64.c 2021-05-19 12:50:47 +10:00
mmu-radix64.h target/ppc: Pass const pointer to ppc_radix64_get_prot_amr() 2020-05-27 15:29:36 +10:00
mmu_helper.c target/ppc: Remove type argument for mmubooke206_get_physical_address 2021-05-19 12:52:07 +10:00
monitor.c hmp: Pass monitor to mon_get_cpu_env() 2020-11-13 12:45:51 +00:00
spr_tcg.h target/ppc: isolated cpu init from translation logic 2021-05-19 10:30:28 +10:00
timebase_helper.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
trace-events trace-events: Delete unused trace points 2020-09-09 17:17:02 +01:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate.c target/ppc: Use translator_loop_temp_check 2021-05-19 10:30:29 +10:00
user_only_helper.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00