mirror of https://github.com/proxmox/mirror_qemu
![]() This adds support for the AMD Phenom/Barcelona's SSE4a instructions. Those include insertq and extrq, which are doing shift and mask on XMM registers, in two versions (immediate shift/length values and stored in another XMM register). Additionally it implements movntss, movntsd, which are scalar non-temporal stores (avoiding cache trashing). These are implemented as normal stores, though. SSE4a is guarded by the SSE4A CPUID bit (Fn8000_0001:ECX[6]). Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> |
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.. | ||
TODO | ||
cpu.h | ||
exec.h | ||
helper.c | ||
helper.h | ||
helper_template.h | ||
kvm.c | ||
machine.c | ||
op_helper.c | ||
ops_sse.h | ||
ops_sse_header.h | ||
svm.h | ||
translate.c |