mirror_qemu/tcg/aarch64/tcg-target-reg-bits.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * Define target-specific register size
 * Copyright (c) 2023 Linaro
 */

#ifndef TCG_TARGET_REG_BITS_H
#define TCG_TARGET_REG_BITS_H

#define TCG_TARGET_REG_BITS  64

#endif