mirror_qemu/target/loongarch/insn_trans
Thomas Huth 0c8e6ac989 target/loongarch: Fix the CSRRD CPUID instruction on big endian hosts
The test in tests/avocado/machine_loongarch.py is currently failing
on big endian hosts like s390x. By comparing the traces between running
the QEMU_EFI.fd bios on a s390x and on a x86 host, it's quickly obvious
that the CSRRD instruction for the CPUID is behaving differently. And
indeed: The code currently does a long read (i.e. 64 bit) from the
address that points to the CPUState->cpu_index field (with tcg_gen_ld_tl()
in the trans_csrrd() function). But this cpu_index field is only an "int"
(i.e. 32 bit). While this dirty pointer magic works on little endian hosts,
it of course fails on big endian hosts. Fix it by using a proper helper
function instead.

Message-Id: <20230720175307.854460-1-thuth@redhat.com>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Thomas Huth <thuth@redhat.com>
(cherry picked from commit c34ad45992)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2023-07-31 09:12:06 +03:00
..
trans_arith.c.inc
trans_atomic.c.inc target/loongarch: Add fixed point atomic instruction translation 2022-06-06 18:09:03 +00:00
trans_bit.c.inc target/loongarch: bstrins.w src register need EXT_NONE 2022-10-17 10:28:35 +08:00
trans_branch.c.inc target/loongarch: Add branch instruction translation 2022-06-06 18:09:03 +00:00
trans_extra.c.inc target/loongarch: Add timer related instructions support. 2022-06-06 18:09:03 +00:00
trans_farith.c.inc target/loongarch: Fix return value of CHECK_FPE 2022-11-07 10:54:11 +08:00
trans_fcmp.c.inc target/loongarch: Fix emulation of float-point disable exception 2022-11-04 17:10:53 +08:00
trans_fcnv.c.inc target/loongarch: Add floating point conversion instruction translation 2022-06-06 18:09:03 +00:00
trans_fmemory.c.inc target/loongarch: Fix emulation of float-point disable exception 2022-11-04 17:10:53 +08:00
trans_fmov.c.inc target/loongarch: Fix emulation of float-point disable exception 2022-11-04 17:10:53 +08:00
trans_memory.c.inc target/loongarch: Add fixed point atomic instruction translation 2022-06-06 18:09:03 +00:00
trans_privileged.c.inc target/loongarch: Fix the CSRRD CPUID instruction on big endian hosts 2023-07-31 09:12:06 +03:00
trans_shift.c.inc