119 lines
5.0 KiB
Diff
119 lines
5.0 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Alexander Bulekov <alxndr@bu.edu>
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Date: Sat, 4 Feb 2023 23:07:34 -0500
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Subject: [PATCH] memory: prevent dma-reentracy issues
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Add a flag to the DeviceState, when a device is engaged in PIO/MMIO/DMA.
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This flag is set/checked prior to calling a device's MemoryRegion
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handlers, and set when device code initiates DMA. The purpose of this
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flag is to prevent two types of DMA-based reentrancy issues:
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1.) mmio -> dma -> mmio case
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2.) bh -> dma write -> mmio case
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These issues have led to problems such as stack-exhaustion and
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use-after-frees.
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Summary of the problem from Peter Maydell:
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https://lore.kernel.org/qemu-devel/CAFEAcA_23vc7hE3iaM-JVA6W38LK4hJoWae5KcknhPRD5fPBZA@mail.gmail.com
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/62
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/540
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/541
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/556
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/557
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/827
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Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1282
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Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
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Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
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Signed-off-by: Alexander Bulekov <alxndr@bu.edu>
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Acked-by: Peter Xu <peterx@redhat.com>
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(picked-up from https://lists.nongnu.org/archive/html/qemu-devel/2023-02/msg01142.html)
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Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
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---
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include/hw/qdev-core.h | 7 +++++++
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softmmu/memory.c | 17 +++++++++++++++++
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softmmu/trace-events | 1 +
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3 files changed, 25 insertions(+)
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diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
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index bd50ad5ee1..7623703943 100644
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--- a/include/hw/qdev-core.h
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+++ b/include/hw/qdev-core.h
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@@ -162,6 +162,10 @@ struct NamedClockList {
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QLIST_ENTRY(NamedClockList) node;
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};
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+typedef struct {
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+ bool engaged_in_io;
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+} MemReentrancyGuard;
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+
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/**
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* DeviceState:
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* @realized: Indicates whether the device has been fully constructed.
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@@ -194,6 +198,9 @@ struct DeviceState {
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int alias_required_for_version;
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ResettableState reset;
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GSList *unplug_blockers;
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+
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+ /* Is the device currently in mmio/pio/dma? Used to prevent re-entrancy */
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+ MemReentrancyGuard mem_reentrancy_guard;
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};
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struct DeviceListener {
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diff --git a/softmmu/memory.c b/softmmu/memory.c
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index b1a6cae6f5..e4d2268d32 100644
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--- a/softmmu/memory.c
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+++ b/softmmu/memory.c
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@@ -533,6 +533,7 @@ static MemTxResult access_with_adjusted_size(hwaddr addr,
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uint64_t access_mask;
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unsigned access_size;
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unsigned i;
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+ DeviceState *dev = NULL;
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MemTxResult r = MEMTX_OK;
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if (!access_size_min) {
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@@ -542,6 +543,19 @@ static MemTxResult access_with_adjusted_size(hwaddr addr,
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access_size_max = 4;
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}
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+ /* Do not allow more than one simultanous access to a device's IO Regions */
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+ if (mr->owner &&
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+ !mr->ram_device && !mr->ram && !mr->rom_device && !mr->readonly) {
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+ dev = (DeviceState *) object_dynamic_cast(mr->owner, TYPE_DEVICE);
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+ if (dev) {
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+ if (dev->mem_reentrancy_guard.engaged_in_io) {
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+ trace_memory_region_reentrant_io(get_cpu_index(), mr, addr, size);
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+ return MEMTX_ERROR;
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+ }
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+ dev->mem_reentrancy_guard.engaged_in_io = true;
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+ }
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+ }
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+
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/* FIXME: support unaligned access? */
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access_size = MAX(MIN(size, access_size_max), access_size_min);
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access_mask = MAKE_64BIT_MASK(0, access_size * 8);
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@@ -556,6 +570,9 @@ static MemTxResult access_with_adjusted_size(hwaddr addr,
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access_mask, attrs);
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}
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}
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+ if (dev) {
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+ dev->mem_reentrancy_guard.engaged_in_io = false;
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+ }
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return r;
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}
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diff --git a/softmmu/trace-events b/softmmu/trace-events
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index 22606dc27b..62d04ea9a7 100644
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--- a/softmmu/trace-events
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+++ b/softmmu/trace-events
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@@ -13,6 +13,7 @@ memory_region_ops_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, u
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memory_region_ops_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size, const char *name) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u name '%s'"
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memory_region_subpage_read(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value 0x%"PRIx64" size %u"
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memory_region_subpage_write(int cpu_index, void *mr, uint64_t offset, uint64_t value, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" value 0x%"PRIx64" size %u"
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+memory_region_reentrant_io(int cpu_index, void *mr, uint64_t offset, unsigned size) "cpu %d mr %p offset 0x%"PRIx64" size %u"
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memory_region_ram_device_read(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u"
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memory_region_ram_device_write(int cpu_index, void *mr, uint64_t addr, uint64_t value, unsigned size) "cpu %d mr %p addr 0x%"PRIx64" value 0x%"PRIx64" size %u"
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memory_region_sync_dirty(const char *mr, const char *listener, int global) "mr '%s' listener '%s' synced (global=%d)"
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