101 lines
4.0 KiB
Diff
101 lines
4.0 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Leonardo Bras <leobras@redhat.com>
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Date: Tue, 2 May 2023 21:27:02 -0300
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Subject: [PATCH] hw/pci: Disable PCI_ERR_UNCOR_MASK register for machine type
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< 8.0
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Since it's implementation on v8.0.0-rc0, having the PCI_ERR_UNCOR_MASK
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set for machine types < 8.0 will cause migration to fail if the target
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QEMU version is < 8.0.0 :
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qemu-system-x86_64: get_pci_config_device: Bad config data: i=0x10a read: 40 device: 0 cmask: ff wmask: 0 w1cmask:0
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qemu-system-x86_64: Failed to load PCIDevice:config
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qemu-system-x86_64: Failed to load e1000e:parent_obj
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qemu-system-x86_64: error while loading state for instance 0x0 of device '0000:00:02.0/e1000e'
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qemu-system-x86_64: load of migration failed: Invalid argument
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The above test migrated a 7.2 machine type from QEMU master to QEMU 7.2.0,
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with this cmdline:
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./qemu-system-x86_64 -M pc-q35-7.2 [-incoming XXX]
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In order to fix this, property x-pcie-err-unc-mask was introduced to
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control when PCI_ERR_UNCOR_MASK is enabled. This property is enabled by
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default, but is disabled if machine type <= 7.2.
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Fixes: 010746ae1d ("hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register")
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Suggested-by: Michael S. Tsirkin <mst@redhat.com>
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Signed-off-by: Leonardo Bras <leobras@redhat.com>
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Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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Reviewed-by: Peter Xu <peterx@redhat.com>
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Reviewed-by: Juan Quintela <quintela@redhat.com>
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(picked up from https://lists.nongnu.org/archive/html/qemu-devel/2023-05/msg00350.html)
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Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
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---
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hw/core/machine.c | 1 +
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hw/pci/pci.c | 2 ++
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hw/pci/pcie_aer.c | 11 +++++++----
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include/hw/pci/pci.h | 2 ++
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4 files changed, 12 insertions(+), 4 deletions(-)
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diff --git a/hw/core/machine.c b/hw/core/machine.c
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index cd13b8b0a3..5060119952 100644
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--- a/hw/core/machine.c
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+++ b/hw/core/machine.c
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@@ -43,6 +43,7 @@ GlobalProperty hw_compat_7_2[] = {
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{ "e1000e", "migrate-timadj", "off" },
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{ "virtio-mem", "x-early-migration", "false" },
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{ "migration", "x-preempt-pre-7-2", "true" },
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+ { TYPE_PCI_DEVICE, "x-pcie-err-unc-mask", "off" },
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};
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const size_t hw_compat_7_2_len = G_N_ELEMENTS(hw_compat_7_2);
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diff --git a/hw/pci/pci.c b/hw/pci/pci.c
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index def5000e7b..8ad4349e96 100644
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--- a/hw/pci/pci.c
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+++ b/hw/pci/pci.c
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@@ -79,6 +79,8 @@ static Property pci_props[] = {
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DEFINE_PROP_STRING("failover_pair_id", PCIDevice,
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failover_pair_id),
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DEFINE_PROP_UINT32("acpi-index", PCIDevice, acpi_index, 0),
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+ DEFINE_PROP_BIT("x-pcie-err-unc-mask", PCIDevice, cap_present,
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+ QEMU_PCIE_ERR_UNC_MASK_BITNR, true),
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DEFINE_PROP_END_OF_LIST()
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};
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diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c
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index 103667c368..374d593ead 100644
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--- a/hw/pci/pcie_aer.c
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+++ b/hw/pci/pcie_aer.c
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@@ -112,10 +112,13 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset,
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pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS,
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PCI_ERR_UNC_SUPPORTED);
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- pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
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- PCI_ERR_UNC_MASK_DEFAULT);
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- pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
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- PCI_ERR_UNC_SUPPORTED);
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+
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+ if (dev->cap_present & QEMU_PCIE_ERR_UNC_MASK) {
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+ pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK,
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+ PCI_ERR_UNC_MASK_DEFAULT);
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+ pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK,
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+ PCI_ERR_UNC_SUPPORTED);
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+ }
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pci_set_long(dev->config + offset + PCI_ERR_UNCOR_SEVER,
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PCI_ERR_UNC_SEVERITY_DEFAULT);
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diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
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index d5a40cd058..6dc6742fc4 100644
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--- a/include/hw/pci/pci.h
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+++ b/include/hw/pci/pci.h
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@@ -207,6 +207,8 @@ enum {
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QEMU_PCIE_EXTCAP_INIT = (1 << QEMU_PCIE_EXTCAP_INIT_BITNR),
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#define QEMU_PCIE_CXL_BITNR 10
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QEMU_PCIE_CAP_CXL = (1 << QEMU_PCIE_CXL_BITNR),
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+#define QEMU_PCIE_ERR_UNC_MASK_BITNR 11
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+ QEMU_PCIE_ERR_UNC_MASK = (1 << QEMU_PCIE_ERR_UNC_MASK_BITNR),
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};
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typedef struct PCIINTxRoute {
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