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* configure: use a native non-cross compiler for linux-user 

* meson: cleanups
 * target/i386: miscellaneous cleanups and optimizations
 * target/i386: implement CMPccXADD
 * target/i386: the sgx_epc_get_section stub is reachable
 * esp: check for NULL result from scsi_device_find()
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* configure: use a native non-cross compiler for linux-user
* meson: cleanups
* target/i386: miscellaneous cleanups and optimizations
* target/i386: implement CMPccXADD
* target/i386: the sgx_epc_get_section stub is reachable
* esp: check for NULL result from scsi_device_find()

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# gpg: Signature made Sun 31 Dec 2023 08:12:22 GMT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (46 commits)
  meson.build: report graphics backends separately
  configure, meson: rename targetos to host_os
  meson: rename config_all
  meson: remove CONFIG_ALL
  meson: remove config_targetos
  meson: remove CONFIG_POSIX and CONFIG_WIN32 from config_targetos
  meson: remove OS definitions from config_targetos
  meson: always probe u2f and canokey if the option is enabled
  meson: move subdirs to "Collect sources" section
  meson: move config-host.h definitions together
  meson: move CFI detection code with other compiler flags
  meson: keep subprojects together
  meson: move accelerator dependency checks together
  meson: move option validation together
  meson: move program checks together
  meson: add more sections to main meson.build
  configure: unify again the case arms in probe_target_compiler
  configure: remove unnecessary subshell
  Makefile: clean qemu-iotests output
  meson: use version_compare() to compare version
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
master
Peter Maydell 2024-01-04 19:55:19 +00:00
parent d328fef93a f705c1f25d
commit 05470c3979
69 changed files with 1188 additions and 950 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Makefile
View File

@ -202,6 +202,7 @@ clean: recurse-clean
! -path ./roms/edk2/ArmPkg/Library/GccLto/liblto-arm.a \
-exec rm {} +
rm -f TAGS cscope.* *~ */*~
@$(MAKE) -Ctests/qemu-iotests clean
VERSION = $(shell cat $(SRC_PATH)/VERSION)

4
accel/tcg/meson.build
View File

@ -17,7 +17,9 @@ if get_option('plugins')
tcg_ss.add(files('plugin-gen.c'))
endif
tcg_ss.add(when: libdw, if_true: files('debuginfo.c'))
tcg_ss.add(when: 'CONFIG_LINUX', if_true: files('perf.c'))
if host_os == 'linux'
tcg_ss.add(files('perf.c'))
endif
specific_ss.add_all(when: 'CONFIG_TCG', if_true: tcg_ss)
specific_ss.add(when: ['CONFIG_SYSTEM_ONLY', 'CONFIG_TCG'], if_true: files(

10
backends/meson.build
View File

@ -10,9 +10,13 @@ system_ss.add([files(
'confidential-guest-support.c',
), numa])
system_ss.add(when: 'CONFIG_POSIX', if_true: files('rng-random.c'))
system_ss.add(when: 'CONFIG_POSIX', if_true: files('hostmem-file.c'))
system_ss.add(when: 'CONFIG_LINUX', if_true: files('hostmem-memfd.c'))
if host_os != 'windows'
system_ss.add(files('rng-random.c'))
system_ss.add(files('hostmem-file.c'))
endif
if host_os == 'linux'
system_ss.add(files('hostmem-memfd.c'))
endif
if keyutils.found()
system_ss.add(keyutils, files('cryptodev-lkcf.c'))
endif

11
block/meson.build
View File

@ -88,10 +88,15 @@ if get_option('parallels').allowed()
block_ss.add(files('parallels.c', 'parallels-ext.c'))
endif
block_ss.add(when: 'CONFIG_WIN32', if_true: files('file-win32.c', 'win32-aio.c'))
block_ss.add(when: 'CONFIG_POSIX', if_true: [files('file-posix.c'), coref, iokit])
if host_os == 'windows'
block_ss.add(files('file-win32.c', 'win32-aio.c'))
else
block_ss.add(files('file-posix.c'), coref, iokit)
endif
block_ss.add(when: libiscsi, if_true: files('iscsi-opts.c'))
block_ss.add(when: 'CONFIG_LINUX', if_true: files('nvme.c'))
if host_os == 'linux'
block_ss.add(files('nvme.c'))
endif
if get_option('replication').allowed()
block_ss.add(files('replication.c'))
endif

2
bsd-user/meson.build
View File

@ -24,6 +24,6 @@ kvm = cc.find_library('kvm', required: true)
bsd_user_ss.add(elf, procstat, kvm)
# Pull in the OS-specific build glue, if any
subdir(targetos)
subdir(host_os)
specific_ss.add_all(when: 'CONFIG_BSD_USER', if_true: bsd_user_ss)

28
chardev/meson.build
View File

@ -12,21 +12,23 @@ chardev_ss.add(files(
'char-udp.c',
'char.c',
))
chardev_ss.add(when: 'CONFIG_POSIX', if_true: [files(
'char-fd.c',
'char-pty.c',
), util])
if targetos in ['linux', 'gnu/kfreebsd', 'freebsd', 'dragonfly']
chardev_ss.add(files('char-parallel.c'))
if host_os == 'windows'
chardev_ss.add(files(
'char-console.c',
'char-win-stdio.c',
'char-win.c',
))
else
chardev_ss.add(files(
'char-fd.c',
'char-pty.c',
), util)
if host_os in ['linux', 'gnu/kfreebsd', 'freebsd', 'dragonfly']
chardev_ss.add(files('char-parallel.c'))
endif
endif
chardev_ss.add(when: 'CONFIG_WIN32', if_true: files(
'char-console.c',
'char-win-stdio.c',
'char-win.c',
))
chardev_ss = chardev_ss.apply(config_targetos, strict: false)
chardev_ss = chardev_ss.apply({})
system_ss.add(files(
'char-hmp-cmds.c',

159
configure vendored
View File

@ -334,30 +334,30 @@ EOF
}
if check_define __linux__ ; then
targetos=linux
host_os=linux
elif check_define _WIN32 ; then
targetos=windows
host_os=windows
elif check_define __OpenBSD__ ; then
targetos=openbsd
host_os=openbsd
elif check_define __sun__ ; then
targetos=sunos
host_os=sunos
elif check_define __HAIKU__ ; then
targetos=haiku
host_os=haiku
elif check_define __FreeBSD__ ; then
targetos=freebsd
host_os=freebsd
elif check_define __FreeBSD_kernel__ && check_define __GLIBC__; then
targetos=gnu/kfreebsd
host_os=gnu/kfreebsd
elif check_define __DragonFly__ ; then
targetos=dragonfly
host_os=dragonfly
elif check_define __NetBSD__; then
targetos=netbsd
host_os=netbsd
elif check_define __APPLE__; then
targetos=darwin
host_os=darwin
else
# This is a fatal error, but don't report it yet, because we
# might be going to just print the --help text, or it might
# be the result of a missing compiler.
targetos=bogus
host_os=bogus
fi
if test ! -z "$cpu" ; then
@ -573,13 +573,13 @@ do
fi
done
if test "$targetos" = "windows" ; then
if test "$host_os" = "windows" ; then
EXESUF=".exe"
fi
meson_option_build_array() {
printf '['
(if test "$targetos" = windows; then
(if test "$host_os" = windows; then
IFS=\;
else
IFS=:
@ -802,7 +802,7 @@ mak_wilds=""
if [ -n "$host_arch" ] && [ -d "$source_path/common-user/host/$host_arch" ]; then
if [ "$linux_user" != no ]; then
if [ "$targetos" = linux ]; then
if [ "$host_os" = linux ]; then
linux_user=yes
elif [ "$linux_user" = yes ]; then
error_exit "linux-user not supported on this architecture"
@ -813,9 +813,9 @@ if [ -n "$host_arch" ] && [ -d "$source_path/common-user/host/$host_arch" ]; the
fi
if [ "$bsd_user" != no ]; then
if [ "$bsd_user" = "" ]; then
test $targetos = freebsd && bsd_user=yes
test $host_os = freebsd && bsd_user=yes
fi
if [ "$bsd_user" = yes ] && ! [ -d "$source_path/bsd-user/$targetos" ]; then
if [ "$bsd_user" = yes ] && ! [ -d "$source_path/bsd-user/$host_os" ]; then
error_exit "bsd-user not supported on this host OS"
fi
if [ "$bsd_user" = "yes" ]; then
@ -998,7 +998,7 @@ if test -z "$ninja"; then
fi
fi
if test "$targetos" = "bogus"; then
if test "$host_os" = "bogus"; then
# Now that we know that we're not printing the help and that
# the compiler works (so the results of the check_defines we used
# to identify the OS are reliable), if we didn't recognize the
@ -1007,7 +1007,7 @@ if test "$targetos" = "bogus"; then
fi
# test for any invalid configuration combinations
if test "$targetos" = "windows" && ! has "$dlltool"; then
if test "$host_os" = "windows" && ! has "$dlltool"; then
if test "$plugins" = "yes"; then
error_exit "TCG plugins requires dlltool to build on Windows platforms"
fi
@ -1041,7 +1041,7 @@ static THREAD int tls_var;
int main(void) { return tls_var; }
EOF
if test "$targetos" = windows || test "$targetos" = haiku; then
if test "$host_os" = windows || test "$host_os" = haiku; then
if test "$pie" = "yes"; then
error_exit "PIE not available due to missing OS support"
fi
@ -1231,6 +1231,7 @@ probe_target_compiler() {
got_cross_cc=no
container_image=
container_hosts=
container_cross_prefix=
container_cross_cc=
container_cross_ar=
container_cross_as=
@ -1272,16 +1273,33 @@ probe_target_compiler() {
test "$container" != no || continue
test "$host" = "$cpu" || continue
case $target_arch in
# debian-all-test-cross architectures
hppa|m68k|mips|riscv64|sparc64)
container_image=debian-all-test-cross
;;
mips64)
container_image=debian-all-test-cross
container_cross_prefix=mips64-linux-gnuabi64-
;;
ppc|ppc64|ppc64le)
container_image=debian-all-test-cross
container_cross_prefix=powerpc${target_arch#ppc}-linux-gnu-
;;
# debian-legacy-test-cross architectures (need Debian 11)
# - libc6.1-dev-alpha-cross: https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=1054412
# - sh4-linux-user: binaries don't run with bookworm compiler
alpha|sh4)
container_image=debian-legacy-test-cross
;;
# architectures with individual containers
aarch64)
# We don't have any bigendian build tools so we only use this for AArch64
container_image=debian-arm64-cross
container_cross_prefix=aarch64-linux-gnu-
container_cross_cc=${container_cross_prefix}gcc
;;
alpha)
container_image=debian-legacy-test-cross
container_cross_prefix=alpha-linux-gnu-
container_cross_cc=${container_cross_prefix}gcc
;;
arm)
# We don't have any bigendian build tools so we only use this for ARM
@ -1290,18 +1308,11 @@ probe_target_compiler() {
;;
cris)
container_image=fedora-cris-cross
container_cross_prefix=cris-linux-gnu-
;;
hexagon)
container_image=debian-hexagon-cross
container_cross_prefix=hexagon-unknown-linux-musl-
container_cross_cc=${container_cross_prefix}clang
;;
hppa)
container_image=debian-all-test-cross
container_cross_prefix=hppa-linux-gnu-
container_cross_cc=${container_cross_prefix}gcc
;;
i386)
container_image=debian-i686-cross
container_cross_prefix=i686-linux-gnu-
@ -1310,59 +1321,19 @@ probe_target_compiler() {
container_image=debian-loongarch-cross
container_cross_prefix=loongarch64-unknown-linux-gnu-
;;
m68k)
container_image=debian-all-test-cross
container_cross_prefix=m68k-linux-gnu-
container_cross_cc=${container_cross_prefix}gcc
;;
microblaze)
container_image=debian-microblaze-cross
container_cross_prefix=microblaze-linux-musl-
;;
mips64el)
container_image=debian-mips64el-cross
container_cross_prefix=mips64el-linux-gnuabi64-
;;
mips64)
container_image=debian-all-test-cross
container_cross_prefix=mips64-linux-gnuabi64-
;;
mips)
container_image=debian-all-test-cross
container_cross_prefix=mips-linux-gnu-
;;
nios2)
container_image=debian-nios2-cross
container_cross_prefix=nios2-linux-gnu-
;;
ppc)
container_image=debian-all-test-cross
container_cross_prefix=powerpc-linux-gnu-
container_cross_cc=${container_cross_prefix}gcc
;;
ppc64|ppc64le)
container_image=debian-all-test-cross
container_cross_prefix=powerpc${target_arch#ppc}-linux-gnu-
;;
riscv64)
container_image=debian-all-test-cross
container_cross_prefix=riscv64-linux-gnu-
;;
sh4)
container_image=debian-legacy-test-cross
container_cross_prefix=sh4-linux-gnu-
;;
sparc64)
container_image=debian-all-test-cross
container_cross_prefix=sparc64-linux-gnu-
;;
tricore)
container_image=debian-tricore-cross
container_cross_prefix=tricore-
;;
x86_64)
container_image=debian-amd64-cross
container_cross_prefix=x86_64-linux-gnu-
;;
xtensa*)
container_image=debian-xtensa-cross
@ -1370,12 +1341,10 @@ probe_target_compiler() {
# default to the dc232b cpu
container_cross_prefix=/opt/2020.07/xtensa-dc232b-elf/bin/xtensa-dc232b-elf-
;;
*)
# Debian and GNU architecture names usually match
container_image=debian-$target_arch-cross
container_cross_prefix=$target_arch-linux-gnu-
;;
esac
# Debian and GNU architecture names usually match
: ${container_image:=debian-$target_arch-cross}
: ${container_cross_prefix:=$target_arch-linux-gnu-}
: ${container_cross_cc:=${container_cross_prefix}gcc}
: ${container_cross_ar:=${container_cross_prefix}ar}
: ${container_cross_as:=${container_cross_prefix}as}
@ -1387,8 +1356,8 @@ probe_target_compiler() {
done
try=cross
# For softmmu/roms we might be able to use the host compiler
if [ "${1%softmmu}" != "$1" ]; then
# For softmmu/roms also look for a bi-endian or multilib-enabled host compiler
if [ "${1%softmmu}" != "$1" ] || test "$target_arch" = "$cpu"; then
case "$target_arch:$cpu" in
aarch64_be:aarch64 | \
armeb:arm | \
@ -1559,7 +1528,7 @@ LINKS="$LINKS pc-bios/s390-ccw/Makefile"
LINKS="$LINKS pc-bios/vof/Makefile"
LINKS="$LINKS .gdbinit scripts" # scripts needed by relative path in .gdbinit
LINKS="$LINKS tests/avocado tests/data"
LINKS="$LINKS tests/qemu-iotests/check"
LINKS="$LINKS tests/qemu-iotests/check tests/qemu-iotests/Makefile"
LINKS="$LINKS python"
LINKS="$LINKS contrib/plugins/Makefile "
for f in $LINKS ; do
@ -1572,8 +1541,8 @@ echo "# Automatically generated by configure - do not modify" > Makefile.prereqs
# Mac OS X ships with a broken assembler
if have_target i386-softmmu x86_64-softmmu && \
test "$targetos" != "darwin" && test "$targetos" != "sunos" && \
test "$targetos" != "haiku" && \
test "$host_os" != "darwin" && test "$host_os" != "sunos" && \
test "$host_os" != "haiku" && \
probe_target_compiler i386-softmmu; then
subdirs="$subdirs pc-bios/optionrom"
config_mak=pc-bios/optionrom/config.mak
@ -1637,7 +1606,7 @@ echo "NINJA=$ninja" >> $config_host_mak
echo "EXESUF=$EXESUF" >> $config_host_mak
# use included Linux headers for KVM architectures
if test "$targetos" = "linux" && test -n "$linux_arch"; then
if test "$host_os" = "linux" && test -n "$linux_arch"; then
symlink "$source_path/linux-headers/asm-$linux_arch" linux-headers/asm
fi
@ -1660,21 +1629,20 @@ echo "SRC_PATH=$source_path/contrib/plugins" >> contrib/plugins/$config_host_mak
echo "PKG_CONFIG=${pkg_config}" >> contrib/plugins/$config_host_mak
echo "CC=$cc $CPU_CFLAGS" >> contrib/plugins/$config_host_mak
echo "CFLAGS=${CFLAGS-$default_cflags} $EXTRA_CFLAGS" >> contrib/plugins/$config_host_mak
if test "$targetos" = windows; then
if test "$host_os" = windows; then
echo "DLLTOOL=$dlltool" >> contrib/plugins/$config_host_mak
fi
if test "$targetos" = darwin; then
if test "$host_os" = darwin; then
echo "CONFIG_DARWIN=y" >> contrib/plugins/$config_host_mak
fi
if test "$targetos" = windows; then
if test "$host_os" = windows; then
echo "CONFIG_WIN32=y" >> contrib/plugins/$config_host_mak
fi
# tests/tcg configuration
(config_host_mak=tests/tcg/config-host.mak
mkdir -p tests/tcg
echo "# Automatically generated by configure - do not modify" > $config_host_mak
echo "SRC_PATH=$source_path" >> $config_host_mak
echo "# Automatically generated by configure - do not modify" > tests/tcg/$config_host_mak
echo "SRC_PATH=$source_path" >> tests/tcg/$config_host_mak
tcg_tests_targets=
for target in $target_list; do
@ -1717,9 +1685,8 @@ for target in $target_list; do
done
if test "$tcg" = "enabled"; then
echo "TCG_TESTS_TARGETS=$tcg_tests_targets" >> config-host.mak
echo "TCG_TESTS_TARGETS=$tcg_tests_targets" >> $config_host_mak
fi
)
if test "$skip_meson" = no; then
cross="config-meson.cross.new"
@ -1748,7 +1715,7 @@ if test "$skip_meson" = no; then
echo "# environment defaults, can still be overridden on " >> $cross
echo "# the command line" >> $cross
if test -e "$source_path/.git" && \
{ test "$targetos" = linux || test "$targetos" = "windows"; }; then
{ test "$host_os" = linux || test "$host_os" = "windows"; }; then
echo 'werror = true' >> $cross
fi
echo "[project options]" >> $cross
@ -1785,7 +1752,7 @@ if test "$skip_meson" = no; then
echo "windmc = [$(meson_quote $windmc)]" >> $cross
if test "$cross_compile" = "yes"; then
echo "[host_machine]" >> $cross
echo "system = '$targetos'" >> $cross
echo "system = '$host_os'" >> $cross
case "$cpu" in
i386)
echo "cpu_family = 'x86'" >> $cross
@ -1811,8 +1778,8 @@ if test "$skip_meson" = no; then
fi
mv $cross config-meson.cross
meson_add_machine_file config-meson.cross
if test -f "$source_path/configs/meson/$targetos.txt"; then
meson_add_machine_file $source_path/configs/meson/$targetos.txt
if test -f "$source_path/configs/meson/$host_os.txt"; then
meson_add_machine_file $source_path/configs/meson/$host_os.txt
fi
rm -rf meson-private meson-info meson-logs

2
contrib/ivshmem-client/meson.build
View File

@ -1,4 +1,4 @@
executable('ivshmem-client', files('ivshmem-client.c', 'main.c'), genh,
dependencies: glib,
build_by_default: targetos == 'linux',
build_by_default: host_os == 'linux',
install: false)

2
contrib/ivshmem-server/meson.build
View File

@ -1,4 +1,4 @@
executable('ivshmem-server', files('ivshmem-server.c', 'main.c'), genh,
dependencies: [qemuutil, rt],
build_by_default: targetos == 'linux',
build_by_default: host_os == 'linux',
install: false)

2
contrib/vhost-user-blk/meson.build
View File

@ -1,4 +1,4 @@
executable('vhost-user-blk', files('vhost-user-blk.c'),
dependencies: [qemuutil, vhost_user],
build_by_default: targetos == 'linux',
build_by_default: host_os == 'linux',
install: false)

2
contrib/vhost-user-input/meson.build
View File

@ -1,4 +1,4 @@
executable('vhost-user-input', files('main.c'),
dependencies: [qemuutil, vhost_user],
build_by_default: targetos == 'linux',
build_by_default: host_os == 'linux',
install: false)

2
contrib/vhost-user-scsi/meson.build
View File

@ -1,6 +1,6 @@
if libiscsi.found()
executable('vhost-user-scsi', files('vhost-user-scsi.c'),
dependencies: [qemuutil, libiscsi, vhost_user],
build_by_default: targetos == 'linux',
build_by_default: host_os == 'linux',
install: false)
endif

15
docs/devel/build-system.rst
View File

@ -256,21 +256,6 @@ Target-independent emulator sourcesets:
``system_ss`` only in system emulators, ``user_ss`` only in user-mode
emulators.
Target-independent sourcesets must exercise particular care when using
``if_false`` rules. The ``if_false`` rule will be used correctly when linking
emulator binaries; however, when *compiling* target-independent files
into .o files, Meson may need to pick *both* the ``if_true`` and
``if_false`` sides to cater for targets that want either side. To
achieve that, you can add a special rule using the ``CONFIG_ALL``
symbol::
# Some targets have CONFIG_ACPI, some don't, so this is not enough
system_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi.c'),
if_false: files('acpi-stub.c'))
# This is required as well:
system_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c'))
Target-dependent emulator sourcesets:
In the target-dependent set lives CPU emulation, some device emulation and
much glue code. This sometimes also has to be compiled multiple times,

2
docs/devel/kconfig.rst
View File

@ -316,6 +316,6 @@ variable::
host_kconfig = \
(have_tpm ? ['CONFIG_TPM=y'] : []) + \
(targetos == 'linux' ? ['CONFIG_LINUX=y'] : []) + \
(host_os == 'linux' ? ['CONFIG_LINUX=y'] : []) + \
(have_ivshmem ? ['CONFIG_IVSHMEM=y'] : []) + \
...

6
fsdev/meson.build
View File

@ -1,13 +1,13 @@
fsdev_ss = ss.source_set()
fsdev_ss.add(files('qemu-fsdev-opts.c', 'qemu-fsdev-throttle.c'))
fsdev_ss.add(when: 'CONFIG_ALL', if_true: files('qemu-fsdev-dummy.c'))
fsdev_ss.add(when: ['CONFIG_FSDEV_9P'], if_true: files(
'9p-iov-marshal.c',
'9p-marshal.c',
'qemu-fsdev.c',
), if_false: files('qemu-fsdev-dummy.c'))
system_ss.add_all(when: 'CONFIG_LINUX', if_true: fsdev_ss)
system_ss.add_all(when: 'CONFIG_DARWIN', if_true: fsdev_ss)
if host_os in ['linux', 'darwin']
system_ss.add_all(fsdev_ss)
endif
if have_virtfs_proxy_helper
executable('virtfs-proxy-helper',

4
gdbstub/meson.build
View File

@ -14,8 +14,8 @@ gdb_system_ss = ss.source_set()
gdb_user_ss.add(files('gdbstub.c', 'user.c'))
gdb_system_ss.add(files('gdbstub.c', 'system.c'))
gdb_user_ss = gdb_user_ss.apply(config_targetos, strict: false)
gdb_system_ss = gdb_system_ss.apply(config_targetos, strict: false)
gdb_user_ss = gdb_user_ss.apply({})
gdb_system_ss = gdb_system_ss.apply({})
libgdb_user = static_library('gdb_user',
gdb_user_ss.sources() + genh,

7
hw/9pfs/meson.build
View File

@ -13,8 +13,11 @@ fs_ss.add(files(
'coth.c',
'coxattr.c',
))
fs_ss.add(when: 'CONFIG_LINUX', if_true: files('9p-util-linux.c'))
fs_ss.add(when: 'CONFIG_DARWIN', if_true: files('9p-util-darwin.c'))
if host_os == 'darwin'
fs_ss.add(files('9p-util-darwin.c'))
elif host_os == 'linux'
fs_ss.add(files('9p-util-linux.c'))
endif
fs_ss.add(when: 'CONFIG_XEN_BUS', if_true: files('xen-9p-backend.c'))
system_ss.add_all(when: 'CONFIG_FSDEV_9P', if_true: fs_ss)

5
hw/acpi/meson.build
View File

@ -33,9 +33,4 @@ endif
system_ss.add(when: 'CONFIG_ACPI', if_false: files('acpi-stub.c', 'aml-build-stub.c', 'ghes-stub.c', 'acpi_interface.c'))
system_ss.add(when: 'CONFIG_ACPI_PCI_BRIDGE', if_false: files('pci-bridge-stub.c'))
system_ss.add_all(when: 'CONFIG_ACPI', if_true: acpi_ss)
system_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c', 'aml-build-stub.c',
'acpi-x86-stub.c', 'ipmi-stub.c', 'ghes-stub.c',
'acpi-mem-hotplug-stub.c', 'acpi-cpu-hotplug-stub.c',
'acpi-pci-hotplug-stub.c', 'acpi-nvdimm-stub.c',
'cxl-stub.c', 'pci-bridge-stub.c'))
system_ss.add(files('acpi-qmp-cmds.c'))

2
hw/cxl/meson.build
View File

@ -11,5 +11,3 @@ system_ss.add(when: 'CONFIG_CXL',
if_false: files(
'cxl-host-stubs.c',
))
system_ss.add(when: 'CONFIG_ALL', if_true: files('cxl-host-stubs.c'))

8
hw/display/meson.build
View File

@ -69,8 +69,11 @@ if config_all_devices.has_key('CONFIG_VIRTIO_GPU')
virtio_gpu_ss = ss.source_set()
virtio_gpu_ss.add(when: 'CONFIG_VIRTIO_GPU',
if_true: [files('virtio-gpu-base.c', 'virtio-gpu.c'), pixman])
virtio_gpu_ss.add(when: 'CONFIG_LINUX', if_true: files('virtio-gpu-udmabuf.c'),
if_false: files('virtio-gpu-udmabuf-stubs.c'))
if host_os == 'linux'
virtio_gpu_ss.add(files('virtio-gpu-udmabuf.c'))
else
virtio_gpu_ss.add(files('virtio-gpu-udmabuf-stubs.c'))
endif
virtio_gpu_ss.add(when: 'CONFIG_VHOST_USER_GPU', if_true: files('vhost-user-gpu.c'))
hw_display_modules += {'virtio-gpu': virtio_gpu_ss}
@ -140,5 +143,4 @@ endif
system_ss.add(when: 'CONFIG_OMAP', if_true: files('omap_lcdc.c'))
system_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-vga-stub.c'))
modules += { 'hw-display': hw_display_modules }

2
hw/i386/sgx-stub.c
View File

@ -34,5 +34,5 @@ void pc_machine_init_sgx_epc(PCMachineState *pcms)
bool sgx_epc_get_section(int section_nr, uint64_t *addr, uint64_t *size)
{
g_assert_not_reached();
return true;
}

1
hw/mem/meson.build
View File

@ -5,7 +5,6 @@ mem_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_mc.c'))
mem_ss.add(when: 'CONFIG_NVDIMM', if_true: files('nvdimm.c'))
mem_ss.add(when: 'CONFIG_CXL_MEM_DEVICE', if_true: files('cxl_type3.c'))
system_ss.add(when: 'CONFIG_CXL_MEM_DEVICE', if_false: files('cxl_type3_stubs.c'))
system_ss.add(when: 'CONFIG_ALL', if_true: files('cxl_type3_stubs.c'))
system_ss.add_all(when: 'CONFIG_MEM_DEVICE', if_true: mem_ss)

2
hw/mips/meson.build
View File

@ -5,7 +5,7 @@ mips_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp.c', 'loon
mips_ss.add(when: 'CONFIG_MALTA', if_true: files('malta.c'))
mips_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('cps.c'))
if 'CONFIG_TCG' in config_all
if 'CONFIG_TCG' in config_all_accel
mips_ss.add(when: 'CONFIG_JAZZ', if_true: files('jazz.c'))
mips_ss.add(when: 'CONFIG_MIPSSIM', if_true: files('mipssim.c'))
mips_ss.add(when: 'CONFIG_FULOONG', if_true: files('fuloong2e.c'))

2
hw/net/meson.build
View File

@ -50,7 +50,6 @@ specific_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('virtio-net.c'))
if have_vhost_net
system_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost_net.c'), if_false: files('vhost_net-stub.c'))
system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost_net-stub.c'))
else
system_ss.add(files('vhost_net-stub.c'))
endif
@ -69,7 +68,6 @@ system_ss.add(when: 'CONFIG_ROCKER', if_true: files(
'rocker/rocker_of_dpa.c',
'rocker/rocker_world.c',
), if_false: files('rocker/qmp-norocker.c'))
system_ss.add(when: 'CONFIG_ALL', if_true: files('rocker/qmp-norocker.c'))
system_ss.add(files('rocker/rocker-hmp-cmds.c'))
subdir('can')

2
hw/pci-bridge/meson.build
View File

@ -13,5 +13,3 @@ pci_ss.add(when: 'CONFIG_CXL', if_true: files('cxl_root_port.c', 'cxl_upstream.c
pci_ss.add(when: 'CONFIG_SIMBA', if_true: files('simba.c'))
system_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
system_ss.add(when: 'CONFIG_ALL', if_true: files('pci_expander_bridge_stubs.c'))

1
hw/pci/meson.build
View File

@ -20,4 +20,3 @@ system_ss.add(when: 'CONFIG_PCI_EXPRESS', if_true: files('pcie_port.c', 'pcie_ho
system_ss.add_all(when: 'CONFIG_PCI', if_true: pci_ss)
system_ss.add(when: 'CONFIG_PCI', if_false: files('pci-stub.c'))
system_ss.add(when: 'CONFIG_ALL', if_true: files('pci-stub.c'))

8
hw/ppc/meson.build
View File

@ -34,9 +34,11 @@ ppc_ss.add(when: ['CONFIG_PSERIES', 'CONFIG_TCG'], if_true: files(
'spapr_softmmu.c',
))
ppc_ss.add(when: 'CONFIG_SPAPR_RNG', if_true: files('spapr_rng.c'))
ppc_ss.add(when: ['CONFIG_PSERIES', 'CONFIG_LINUX'], if_true: files(
'spapr_pci_vfio.c',
))
if host_os == 'linux'
ppc_ss.add(when: 'CONFIG_PSERIES', if_true: files(
'spapr_pci_vfio.c',
))
endif
# IBM PowerNV
ppc_ss.add(when: 'CONFIG_POWERNV', if_true: files(

1
hw/remote/meson.build
View File

@ -11,7 +11,6 @@ remote_ss.add(when: 'CONFIG_MULTIPROCESS', if_true: files('iommu.c'))
remote_ss.add(when: 'CONFIG_VFIO_USER_SERVER', if_true: libvfio_user_dep)
remote_ss.add(when: 'CONFIG_VFIO_USER_SERVER', if_true: files('vfio-user-obj.c'),
if_false: files('vfio-user-obj-stub.c'))
remote_ss.add(when: 'CONFIG_ALL', if_true: files('vfio-user-obj-stub.c'))
specific_ss.add(when: 'CONFIG_MULTIPROCESS', if_true: files('memory.c'))
specific_ss.add(when: 'CONFIG_MULTIPROCESS', if_true: files('proxy-memory-listener.c'))

9
hw/scsi/esp.c
View File

@ -292,6 +292,15 @@ static void do_command_phase(ESPState *s)
esp_fifo_pop_buf(&s->cmdfifo, buf, cmdlen);
current_lun = scsi_device_find(&s->bus, 0, s->current_dev->id, s->lun);
if (!current_lun) {
/* No such drive */
s->rregs[ESP_RSTAT] = 0;
s->rregs[ESP_RINTR] = INTR_DC;
s->rregs[ESP_RSEQ] = SEQ_0;
esp_raise_irq(s);
return;
}
s->current_req = scsi_req_new(current_lun, 0, s->lun, buf, cmdlen, s);
datalen = scsi_req_enqueue(s->current_req);
s->ti_size = datalen;

5
hw/smbios/meson.build
View File

@ -6,8 +6,3 @@ smbios_ss.add(when: 'CONFIG_IPMI',
system_ss.add_all(when: 'CONFIG_SMBIOS', if_true: smbios_ss)
system_ss.add(when: 'CONFIG_SMBIOS', if_false: files('smbios-stub.c'))
system_ss.add(when: 'CONFIG_ALL', if_true: files(
'smbios-stub.c',
'smbios_type_38-stub.c',
))

8
hw/usb/meson.build
View File

@ -44,7 +44,9 @@ system_ss.add(when: 'CONFIG_USB_STORAGE_UAS', if_true: files('dev-uas.c'))
system_ss.add(when: 'CONFIG_USB_AUDIO', if_true: files('dev-audio.c'))
system_ss.add(when: 'CONFIG_USB_SERIAL', if_true: files('dev-serial.c'))
system_ss.add(when: 'CONFIG_USB_NETWORK', if_true: files('dev-network.c'))
system_ss.add(when: ['CONFIG_POSIX', 'CONFIG_USB_STORAGE_MTP'], if_true: files('dev-mtp.c'))
if host_os != 'windows'
system_ss.add(when: 'CONFIG_USB_STORAGE_MTP', if_true: files('dev-mtp.c'))
endif
# smartcard
system_ss.add(when: 'CONFIG_USB_SMARTCARD', if_true: files('dev-smartcard-reader.c'))
@ -58,7 +60,9 @@ endif
# U2F
system_ss.add(when: 'CONFIG_USB_U2F', if_true: files('u2f.c'))
system_ss.add(when: ['CONFIG_LINUX', 'CONFIG_USB_U2F'], if_true: [libudev, files('u2f-passthru.c')])
if host_os == 'linux'
system_ss.add(when: 'CONFIG_USB_U2F', if_true: [libudev, files('u2f-passthru.c')])
endif
if u2f.found()
system_ss.add(when: 'CONFIG_USB_U2F', if_true: [u2f, files('u2f-emulated.c')])
endif

2
hw/virtio/meson.build
View File

@ -74,8 +74,6 @@ specific_virtio_ss.add_all(when: 'CONFIG_VIRTIO_PCI', if_true: virtio_pci_ss)
system_ss.add_all(when: 'CONFIG_VIRTIO', if_true: system_virtio_ss)
system_ss.add(when: 'CONFIG_VIRTIO', if_false: files('vhost-stub.c'))
system_ss.add(when: 'CONFIG_VIRTIO', if_false: files('virtio-stub.c'))
system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-stub.c'))
system_ss.add(when: 'CONFIG_ALL', if_true: files('virtio-stub.c'))
system_ss.add(files('virtio-hmp-cmds.c'))
specific_ss.add_all(when: 'CONFIG_VIRTIO', if_true: specific_virtio_ss)

943
meson.build
View File

File diff suppressed because it is too large Load Diff

2
meson_options.txt
View File

@ -101,7 +101,7 @@ option('cfi_debug', type: 'boolean', value: false,
description: 'Verbose errors in case of CFI violation')
option('multiprocess', type: 'feature', value: 'auto',
description: 'Out of process device emulation support')
option('relocatable', type : 'boolean', value : 'true',
option('relocatable', type : 'boolean', value : true,
description: 'toggle relocatable install')
option('vfio_user_server', type: 'feature', value: 'disabled',
description: 'vfio-user server support')

4
net/can/meson.build
View File

@ -1,5 +1,7 @@
can_ss = ss.source_set()
can_ss.add(files('can_core.c', 'can_host.c'))
can_ss.add(when: 'CONFIG_LINUX', if_true: files('can_socketcan.c'))
if host_os == 'linux'
can_ss.add(files('can_socketcan.c'))
endif
system_ss.add_all(when: 'CONFIG_CAN_BUS', if_true: can_ss)

10
net/meson.build
View File

@ -41,23 +41,21 @@ system_ss.add(when: libxdp, if_true: files('af-xdp.c'))
if have_vhost_net_user
system_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost-user.c'), if_false: files('vhost-user-stub.c'))
system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-user-stub.c'))
endif
if targetos == 'windows'
if host_os == 'windows'
system_ss.add(files('tap-win32.c'))
elif targetos == 'linux'
elif host_os == 'linux'
system_ss.add(files('tap.c', 'tap-linux.c'))
elif targetos in bsd_oses
elif host_os in bsd_oses
system_ss.add(files('tap.c', 'tap-bsd.c'))
elif targetos == 'sunos'
elif host_os == 'sunos'
system_ss.add(files('tap.c', 'tap-solaris.c'))
else
system_ss.add(files('tap.c', 'tap-stub.c'))
endif
if have_vhost_net_vdpa
system_ss.add(when: 'CONFIG_VIRTIO_NET', if_true: files('vhost-vdpa.c'), if_false: files('vhost-vdpa-stub.c'))
system_ss.add(when: 'CONFIG_ALL', if_true: files('vhost-vdpa-stub.c'))
endif
vmnet_files = files(

4
plugins/meson.build
View File

@ -1,7 +1,7 @@
plugin_ldflags = []
# Modules need more symbols than just those in plugins/qemu-plugins.symbols
if not enable_modules
if targetos == 'darwin'
if host_os == 'darwin'
configure_file(
input: files('qemu-plugins.symbols'),
output: 'qemu-plugins-ld64.symbols',
@ -14,7 +14,7 @@ if not enable_modules
endif
if get_option('plugins')
if targetos == 'windows'
if host_os == 'windows'
dlltool = find_program('dlltool', required: true)
# Generate a .lib file for plugins to link against.

50
qga/meson.build
View File

@ -7,7 +7,7 @@ if not have_ga
endif
have_qga_vss = get_option('qga_vss') \
.require(targetos == 'windows',
.require(host_os == 'windows',
error_message: 'VSS support requires Windows') \
.require('cpp' in all_languages,
error_message: 'VSS support requires a C++ compiler') \
@ -67,29 +67,31 @@ qga_ss.add(files(
'main.c',
'cutils.c',
))
qga_ss.add(when: 'CONFIG_POSIX', if_true: files(
'channel-posix.c',
'commands-posix.c',
'commands-posix-ssh.c',
))
qga_ss.add(when: 'CONFIG_LINUX', if_true: files(
'commands-linux.c',
))
qga_ss.add(when: 'CONFIG_BSD', if_true: files(
'commands-bsd.c',
))
qga_ss.add(when: 'CONFIG_WIN32', if_true: files(
'channel-win32.c',
'commands-win32.c',
'service-win32.c',
'vss-win32.c'
))
if host_os == 'windows'
qga_ss.add(files(
'channel-win32.c',
'commands-win32.c',
'service-win32.c',
'vss-win32.c'
))
else
qga_ss.add(files(
'channel-posix.c',
'commands-posix.c',
'commands-posix-ssh.c',
))
if host_os == 'linux'
qga_ss.add(files('commands-linux.c'))
elif host_os in bsd_oses
qga_ss.add(files('commands-bsd.c'))
endif
endif
qga_ss = qga_ss.apply(config_targetos, strict: false)
qga_ss = qga_ss.apply({})
gen_tlb = []
qga_libs = []
if targetos == 'windows'
if host_os == 'windows'
qga_libs += ['-lws2_32', '-lwinmm', '-lpowrprof', '-lwtsapi32', '-lwininet', '-liphlpapi', '-lnetapi32',
'-lsetupapi', '-lcfgmgr32']
if have_qga_vss
@ -99,7 +101,7 @@ if targetos == 'windows'
endif
qga_objs = []
if targetos == 'windows'
if host_os == 'windows'
windmc = find_program('windmc', required: true)
windres = find_program('windres', required: true)
@ -121,7 +123,7 @@ qga = executable('qemu-ga', qga_ss.sources() + qga_objs,
install: true)
all_qga += qga
if targetos == 'windows'
if host_os == 'windows'
qemu_ga_msi_arch = {
'x86': ['-D', 'Arch=32'],
'x86_64': ['-a', 'x64', '-D', 'Arch=64']
@ -140,7 +142,7 @@ if targetos == 'windows'
qemu_ga_msi_vss = ['-D', 'InstallVss']
deps += qga_vss
endif
if glib.version() < '2.73.2'
if glib.version().version_compare('<2.73.2')
libpcre = 'libpcre1'
else
libpcre = 'libpcre2'
@ -183,7 +185,7 @@ test_env.set('G_TEST_BUILDDIR', meson.current_build_dir())
# the leak detector in build-oss-fuzz Gitlab CI test. we should re-enable
# this when an alternative is implemented or when the underlying glib
# issue is identified/fix
#if targetos != 'windows'
#if host_os != 'windows'
if false
srcs = [files('commands-posix-ssh.c')]
i = 0

8
scsi/meson.build
View File

@ -1,4 +1,6 @@
block_ss.add(files('utils.c'))
block_ss.add(when: 'CONFIG_LINUX',
if_true: files('pr-manager.c', 'pr-manager-helper.c'),
if_false: files('pr-manager-stub.c'))
if host_os == 'linux'
block_ss.add(files('pr-manager.c', 'pr-manager-helper.c'))
else
block_ss.add(files('pr-manager-stub.c'))
endif

2
storage-daemon/meson.build
View File

@ -5,7 +5,7 @@ qsd_ss.add(blockdev, chardev, qmp, qom, qemuutil, gnutls)
subdir('qapi')
if have_tools
qsd_ss = qsd_ss.apply(config_targetos, strict: false)
qsd_ss = qsd_ss.apply({})
qsd = executable('qemu-storage-daemon',
qsd_ss.sources(),
dependencies: qsd_ss.dependencies(),

4
system/meson.build
View File

@ -33,4 +33,6 @@ endif
system_ss.add(when: seccomp, if_true: files('qemu-seccomp.c'))
system_ss.add(when: fdt, if_true: files('device_tree.c'))
system_ss.add(when: 'CONFIG_LINUX', if_true: files('async-teardown.c'))
if host_os == 'linux'
system_ss.add(files('async-teardown.c'))
endif

2
target/arm/meson.build
View File

@ -28,7 +28,7 @@ arm_system_ss.add(files(
subdir('hvf')
if 'CONFIG_TCG' in config_all
if 'CONFIG_TCG' in config_all_accel
subdir('tcg')
else
arm_ss.add(files('tcg-stubs.c'))

2
target/i386/cpu.c
View File

@ -738,7 +738,7 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
#define TCG_7_0_EDX_FEATURES (CPUID_7_0_EDX_FSRM | CPUID_7_0_EDX_KERNEL_FEATURES)
#define TCG_7_1_EAX_FEATURES (CPUID_7_1_EAX_FZRM | CPUID_7_1_EAX_FSRS | \
CPUID_7_1_EAX_FSRC)
CPUID_7_1_EAX_FSRC | CPUID_7_1_EAX_CMPCCXADD)
#define TCG_7_1_EDX_FEATURES 0
#define TCG_7_2_EDX_FEATURES 0
#define TCG_APM_FEATURES 0

5
target/i386/cpu.h
View File

@ -1285,6 +1285,7 @@ typedef enum {
CC_OP_NB,
} CCOp;
QEMU_BUILD_BUG_ON(CC_OP_NB >= 128);
typedef struct SegmentCache {
uint32_t selector;
@ -2344,13 +2345,13 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank,
uint64_t status, uint64_t mcg_status, uint64_t addr,
uint64_t misc, int flags);
uint32_t cpu_cc_compute_all(CPUX86State *env1, int op);
uint32_t cpu_cc_compute_all(CPUX86State *env1);
static inline uint32_t cpu_compute_eflags(CPUX86State *env)
{
uint32_t eflags = env->eflags;
if (tcg_enabled()) {
eflags |= cpu_cc_compute_all(env, CC_OP) | (env->df & DF_MASK);
eflags |= cpu_cc_compute_all(env) | (env->df & DF_MASK);
}
return eflags;
}

6
target/i386/tcg/cc_helper.c
View File

@ -220,9 +220,9 @@ target_ulong helper_cc_compute_all(target_ulong dst, target_ulong src1,
}
}
uint32_t cpu_cc_compute_all(CPUX86State *env, int op)
uint32_t cpu_cc_compute_all(CPUX86State *env)
{
return helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, op);
return helper_cc_compute_all(CC_DST, CC_SRC, CC_SRC2, CC_OP);
}
target_ulong helper_cc_compute_c(target_ulong dst, target_ulong src1,
@ -335,7 +335,7 @@ target_ulong helper_read_eflags(CPUX86State *env)
{
uint32_t eflags;
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = cpu_cc_compute_all(env);
eflags |= (env->df & DF_MASK);
eflags |= env->eflags & ~(VM_MASK | RF_MASK);
return eflags;

152
target/i386/tcg/decode-new.c.inc
View File

@ -26,6 +26,13 @@
* size (X86_SIZE_*) codes used in the manual. There are a few differences
* though.
*
* Operand sizes
* -------------
*
* The manual lists d64 ("cannot encode 32-bit size in 64-bit mode") and f64
* ("cannot encode 16-bit or 32-bit size in 64-bit mode") as modifiers of the
* "v" or "z" sizes. The decoder simply makes them separate operand sizes.
*
* Vector operands
* ---------------
*
@ -44,6 +51,11 @@
* if the difference is expressed via prefixes. Individual instructions
* are separated by prefix in the generator functions.
*
* There is a custom size "xh" used to address half of a SSE/AVX operand.
* This points to a 64-bit operand for SSE operations, 128-bit operand
* for 256-bit AVX operands, etc. It is used for conversion operations
* such as VCVTPH2PS or VCVTSS2SD.
*
* There are a couple cases in which instructions (e.g. MOVD) write the
* whole XMM or MM register but are established incorrectly in the manual
* as "d" or "q". These have to be fixed for the decoder to work correctly.
@ -139,10 +151,13 @@
#define cpuid(feat) .cpuid = X86_FEAT_##feat,
#define xchg .special = X86_SPECIAL_Locked,
#define lock .special = X86_SPECIAL_HasLock,
#define mmx .special = X86_SPECIAL_MMX,
#define zext0 .special = X86_SPECIAL_ZExtOp0,
#define zext2 .special = X86_SPECIAL_ZExtOp2,
#define op0_Rd .special = X86_SPECIAL_Op0_Rd,
#define op2_Ry .special = X86_SPECIAL_Op2_Ry,
#define avx_movx .special = X86_SPECIAL_AVXExtMov,
#define sextT0 .special = X86_SPECIAL_SExtT0,
#define zextT0 .special = X86_SPECIAL_ZExtT0,
#define vex1 .vex_class = 1,
#define vex1_rep3 .vex_class = 1, .vex_special = X86_VEX_REPScalar,
@ -523,6 +538,28 @@ static const X86OpEntry opcodes_0F38_00toEF[240] = {
[0xdd] = X86_OP_ENTRY3(VAESENCLAST, V,x, H,x, W,x, vex4 cpuid(AES) p_66),
[0xde] = X86_OP_ENTRY3(VAESDEC, V,x, H,x, W,x, vex4 cpuid(AES) p_66),
[0xdf] = X86_OP_ENTRY3(VAESDECLAST, V,x, H,x, W,x, vex4 cpuid(AES) p_66),
/*
* REG selects srcdest2 operand, VEX.vvvv selects src3. VEX class not found
* in manual, assumed to be 13 from the VEX.L0 constraint.
*/
[0xe0] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xe1] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xe2] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xe3] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xe4] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xe5] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xe6] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xe7] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xe8] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xe9] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xea] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xeb] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xec] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xed] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xee] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
[0xef] = X86_OP_ENTRY3(CMPccXADD, M,y, G,y, B,y, vex13 xchg chk(o64) cpuid(CMPCCXADD) p_66),
};
/* five rows for no prefix, 66, F3, F2, 66+F2 */
@ -558,8 +595,8 @@ static const X86OpEntry opcodes_0F38_F0toFF[16][5] = {
[5] = {
X86_OP_ENTRY3(BZHI, G,y, E,y, B,y, vex13 cpuid(BMI1)),
{},
X86_OP_ENTRY3(PEXT, G,y, B,y, E,y, vex13 cpuid(BMI2)),
X86_OP_ENTRY3(PDEP, G,y, B,y, E,y, vex13 cpuid(BMI2)),
X86_OP_ENTRY3(PEXT, G,y, B,y, E,y, vex13 zextT0 cpuid(BMI2)),
X86_OP_ENTRY3(PDEP, G,y, B,y, E,y, vex13 zextT0 cpuid(BMI2)),
{},
},
[6] = {
@ -570,10 +607,10 @@ static const X86OpEntry opcodes_0F38_F0toFF[16][5] = {
{},
},
[7] = {
X86_OP_ENTRY3(BEXTR, G,y, E,y, B,y, vex13 cpuid(BMI1)),
X86_OP_ENTRY3(BEXTR, G,y, E,y, B,y, vex13 zextT0 cpuid(BMI1)),
X86_OP_ENTRY3(SHLX, G,y, E,y, B,y, vex13 cpuid(BMI1)),
X86_OP_ENTRY3(SARX, G,y, E,y, B,y, vex13 cpuid(BMI1)),
X86_OP_ENTRY3(SHRX, G,y, E,y, B,y, vex13 cpuid(BMI1)),
X86_OP_ENTRY3(SARX, G,y, E,y, B,y, vex13 sextT0 cpuid(BMI1)),
X86_OP_ENTRY3(SHRX, G,y, E,y, B,y, vex13 zextT0 cpuid(BMI1)),
{},
},
};
@ -619,13 +656,13 @@ static const X86OpEntry opcodes_0F3A[256] = {
[0x05] = X86_OP_ENTRY3(VPERMILPD_i, V,x, W,x, I,b, vex6 chk(W0) cpuid(AVX) p_66),
[0x06] = X86_OP_ENTRY4(VPERM2x128, V,qq, H,qq, W,qq, vex6 chk(W0) cpuid(AVX) p_66),
[0x14] = X86_OP_ENTRY3(PEXTRB, E,b, V,dq, I,b, vex5 cpuid(SSE41) zext0 p_66),
[0x15] = X86_OP_ENTRY3(PEXTRW, E,w, V,dq, I,b, vex5 cpuid(SSE41) zext0 p_66),
[0x14] = X86_OP_ENTRY3(PEXTRB, E,b, V,dq, I,b, vex5 cpuid(SSE41) op0_Rd p_66),
[0x15] = X86_OP_ENTRY3(PEXTRW, E,w, V,dq, I,b, vex5 cpuid(SSE41) op0_Rd p_66),
[0x16] = X86_OP_ENTRY3(PEXTR, E,y, V,dq, I,b, vex5 cpuid(SSE41) p_66),
[0x17] = X86_OP_ENTRY3(VEXTRACTPS, E,d, V,dq, I,b, vex5 cpuid(SSE41) p_66),
[0x1d] = X86_OP_ENTRY3(VCVTPS2PH, W,xh, V,x, I,b, vex11 chk(W0) cpuid(F16C) p_66),
[0x20] = X86_OP_ENTRY4(PINSRB, V,dq, H,dq, E,b, vex5 cpuid(SSE41) zext2 p_66),
[0x20] = X86_OP_ENTRY4(PINSRB, V,dq, H,dq, E,b, vex5 cpuid(SSE41) op2_Ry p_66),
[0x21] = X86_OP_GROUP0(VINSERTPS),
[0x22] = X86_OP_ENTRY4(PINSR, V,dq, H,dq, E,y, vex5 cpuid(SSE41) p_66),
@ -1091,10 +1128,6 @@ static int decode_modrm(DisasContext *s, CPUX86State *env, X86DecodedInsn *decod
{
int modrm = get_modrm(s, env);
if ((modrm >> 6) == 3) {
if (s->prefix & PREFIX_LOCK) {
decode->e.gen = gen_illegal;
return 0xff;
}
op->n = (modrm & 7);
if (type != X86_TYPE_Q && type != X86_TYPE_N) {
op->n |= REX_B(s);
@ -1201,6 +1234,8 @@ static bool decode_op(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode,
case X86_TYPE_None: /* Implicit or absent */
case X86_TYPE_A: /* Implicit */
case X86_TYPE_F: /* EFLAGS/RFLAGS */
case X86_TYPE_X: /* string source */
case X86_TYPE_Y: /* string destination */
break;
case X86_TYPE_B: /* VEX.vvvv selects a GPR */
@ -1316,43 +1351,15 @@ static bool decode_op(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode,
}
case X86_TYPE_I: /* Immediate */
op->unit = X86_OP_IMM;
decode->immediate = insn_get_signed(env, s, op->ot);
break;
case X86_TYPE_J: /* Relative offset for a jump */
op->unit = X86_OP_IMM;
decode->immediate = insn_get_signed(env, s, op->ot);
decode->immediate += s->pc - s->cs_base;
if (s->dflag == MO_16) {
decode->immediate &= 0xffff;
} else if (!CODE64(s)) {
decode->immediate &= 0xffffffffu;
}
break;
case X86_TYPE_L: /* The upper 4 bits of the immediate select a 128-bit register */
op->n = insn_get(env, s, op->ot) >> 4;
break;
case X86_TYPE_X: /* string source */
op->n = -1;
decode->mem = (AddressParts) {
.def_seg = R_DS,
.base = R_ESI,
.index = -1,
};
break;
case X86_TYPE_Y: /* string destination */
op->n = -1;
decode->mem = (AddressParts) {
.def_seg = R_ES,
.base = R_EDI,
.index = -1,
};
break;
case X86_TYPE_2op:
*op = decode->op[0];
break;
@ -1518,6 +1525,9 @@ static bool has_cpuid_feature(DisasContext *s, X86CPUIDFeature cpuid)
return (s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_AVX2);
case X86_FEAT_SHA_NI:
return (s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_SHA_NI);
case X86_FEAT_CMPCCXADD:
return (s->cpuid_7_1_eax_features & CPUID_7_1_EAX_CMPCCXADD);
}
g_assert_not_reached();
}
@ -1677,6 +1687,7 @@ static void disas_insn_new(DisasContext *s, CPUState *cpu, int b)
bool first = true;
X86DecodedInsn decode;
X86DecodeFunc decode_func = decode_root;
uint8_t cc_live;
s->has_modrm = false;
@ -1830,6 +1841,7 @@ static void disas_insn_new(DisasContext *s, CPUState *cpu, int b)
}
memset(&decode, 0, sizeof(decode));
decode.cc_op = -1;
decode.b = b;
if (!decode_insn(s, env, decode_func, &decode)) {
goto illegal_op;
@ -1869,19 +1881,22 @@ static void disas_insn_new(DisasContext *s, CPUState *cpu, int b)
if (decode.op[0].has_ea) {
s->prefix |= PREFIX_LOCK;
}
decode.e.special = X86_SPECIAL_HasLock;
/* fallthrough */
case X86_SPECIAL_HasLock:
break;
case X86_SPECIAL_ZExtOp0:
case X86_SPECIAL_Op0_Rd:
assert(decode.op[0].unit == X86_OP_INT);
if (!decode.op[0].has_ea) {
decode.op[0].ot = MO_32;
}
break;
case X86_SPECIAL_ZExtOp2:
case X86_SPECIAL_Op2_Ry:
assert(decode.op[2].unit == X86_OP_INT);
if (!decode.op[2].has_ea) {
decode.op[2].ot = MO_32;
decode.op[2].ot = s->dflag == MO_16 ? MO_32 : s->dflag;
}
break;
@ -1893,10 +1908,22 @@ static void disas_insn_new(DisasContext *s, CPUState *cpu, int b)
}
break;
case X86_SPECIAL_SExtT0:
case X86_SPECIAL_ZExtT0:
/* Handled in gen_load. */
assert(decode.op[1].unit == X86_OP_INT);
break;
default:
break;
}
if (s->prefix & PREFIX_LOCK) {
if (decode.e.special != X86_SPECIAL_HasLock || !decode.op[0].has_ea) {
goto illegal_op;
}
}
if (!validate_vex(s, &decode)) {
return;
}
@ -1940,9 +1967,6 @@ static void disas_insn_new(DisasContext *s, CPUState *cpu, int b)
gen_load_ea(s, &decode.mem, decode.e.vex_class == 12);
}
if (s->prefix & PREFIX_LOCK) {
if (decode.op[0].unit != X86_OP_INT || !decode.op[0].has_ea) {
goto illegal_op;
}
gen_load(s, &decode, 2, s->T1);
decode.e.gen(s, env, &decode);
} else {
@ -1956,6 +1980,38 @@ static void disas_insn_new(DisasContext *s, CPUState *cpu, int b)
decode.e.gen(s, env, &decode);
gen_writeback(s, &decode, 0, s->T0);
}
/*
* Write back flags after last memory access. Some newer ALU instructions, as
* well as SSE instructions, write flags in the gen_* function, but that can
* cause incorrect tracking of CC_OP for instructions that write to both memory
* and flags.
*/
if (decode.cc_op != -1) {
if (decode.cc_dst) {
tcg_gen_mov_tl(cpu_cc_dst, decode.cc_dst);
}
if (decode.cc_src) {
tcg_gen_mov_tl(cpu_cc_src, decode.cc_src);
}
if (decode.cc_src2) {
tcg_gen_mov_tl(cpu_cc_src2, decode.cc_src2);
}
if (decode.cc_op == CC_OP_DYNAMIC) {
tcg_gen_mov_i32(cpu_cc_op, decode.cc_op_dynamic);
}
set_cc_op(s, decode.cc_op);
cc_live = cc_op_live[decode.cc_op];
} else {
cc_live = 0;
}
if (decode.cc_op != CC_OP_DYNAMIC) {
assert(!decode.cc_op_dynamic);
assert(!!decode.cc_dst == !!(cc_live & USES_CC_DST));
assert(!!decode.cc_src == !!(cc_live & USES_CC_SRC));
assert(!!decode.cc_src2 == !!(cc_live & USES_CC_SRC2));
}
return;
gp_fault:
gen_exception_gpf(s);

29
target/i386/tcg/decode-new.h
View File

@ -104,6 +104,7 @@ typedef enum X86CPUIDFeature {
X86_FEAT_AVX2,
X86_FEAT_BMI1,
X86_FEAT_BMI2,
X86_FEAT_CMPCCXADD,
X86_FEAT_F16C,
X86_FEAT_FMA,
X86_FEAT_MOVBE,
@ -158,15 +159,27 @@ typedef enum X86InsnCheck {
typedef enum X86InsnSpecial {
X86_SPECIAL_None,
/* Accepts LOCK prefix; LOCKed operations do not load or writeback operand 0 */
X86_SPECIAL_HasLock,
/* Always locked if it has a memory operand (XCHG) */
X86_SPECIAL_Locked,
/*
* Register operand 0/2 is zero extended to 32 bits. Rd/Mb or Rd/Mw
* in the manual.
* Rd/Mb or Rd/Mw in the manual: register operand 0 is treated as 32 bits
* (and writeback zero-extends it to 64 bits if applicable). PREFIX_DATA
* does not trigger 16-bit writeback and, as a side effect, high-byte
* registers are never used.
*/
X86_SPECIAL_ZExtOp0,
X86_SPECIAL_ZExtOp2,
X86_SPECIAL_Op0_Rd,
/*
* Ry/Mb in the manual (PINSRB). However, the high bits are never used by
* the instruction in either the register or memory cases; the *real* effect
* of this modifier is that high-byte registers are never used, even without
* a REX prefix. Therefore, PINSRW does not need it despite having Ry/Mw.
*/
X86_SPECIAL_Op2_Ry,
/*
* Register operand 2 is extended to full width, while a memory operand
@ -179,6 +192,10 @@ typedef enum X86InsnSpecial {
* become P/P/Q/N, and size "x" becomes "q".
*/
X86_SPECIAL_MMX,
/* When loaded into s->T0, register operand 1 is zero/sign extended. */
X86_SPECIAL_SExtT0,
X86_SPECIAL_ZExtT0,
} X86InsnSpecial;
/*
@ -267,6 +284,10 @@ struct X86DecodedInsn {
target_ulong immediate;
AddressParts mem;
TCGv cc_dst, cc_src, cc_src2;
TCGv_i32 cc_op_dynamic;
int8_t cc_op;
uint8_t b;
};

224
target/i386/tcg/emit.c.inc
View File

@ -55,11 +55,6 @@ static void gen_NM_exception(DisasContext *s)
gen_exception(s, EXCP07_PREX);
}
static void gen_illegal(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{
gen_illegal_opcode(s);
}
static void gen_load_ea(DisasContext *s, AddressParts *mem, bool is_vsib)
{
TCGv ea = gen_lea_modrm_1(s, *mem, is_vsib);
@ -237,9 +232,30 @@ static void gen_load(DisasContext *s, X86DecodedInsn *decode, int opn, TCGv v)
break;
case X86_OP_INT:
if (op->has_ea) {
gen_op_ld_v(s, op->ot, v, s->A0);
if (v == s->T0 && decode->e.special == X86_SPECIAL_SExtT0) {
gen_op_ld_v(s, op->ot | MO_SIGN, v, s->A0);
} else {
gen_op_ld_v(s, op->ot, v, s->A0);
}
} else if (op->ot == MO_8 && byte_reg_is_xH(s, op->n)) {
if (v == s->T0 && decode->e.special == X86_SPECIAL_SExtT0) {
tcg_gen_sextract_tl(v, cpu_regs[op->n - 4], 8, 8);
} else {
tcg_gen_extract_tl(v, cpu_regs[op->n - 4], 8, 8);
}
} else if (op->ot < MO_TL && v == s->T0 &&
(decode->e.special == X86_SPECIAL_SExtT0 ||
decode->e.special == X86_SPECIAL_ZExtT0)) {
if (decode->e.special == X86_SPECIAL_SExtT0) {
tcg_gen_ext_tl(v, cpu_regs[op->n], op->ot | MO_SIGN);
} else {
tcg_gen_ext_tl(v, cpu_regs[op->n], op->ot);
}
} else {
gen_op_mov_v_reg(s, op->ot, v, op->n);
tcg_gen_mov_tl(v, cpu_regs[op->n]);
}
break;
case X86_OP_IMM:
@ -323,6 +339,19 @@ static inline int vector_len(DisasContext *s, X86DecodedInsn *decode)
return s->vex_l ? 32 : 16;
}
static void prepare_update1_cc(X86DecodedInsn *decode, DisasContext *s, CCOp op)
{
decode->cc_dst = s->T0;
decode->cc_op = op;
}
static void prepare_update2_cc(X86DecodedInsn *decode, DisasContext *s, CCOp op)
{
decode->cc_src = s->T1;
decode->cc_dst = s->T0;
decode->cc_op = op;
}
static void gen_store_sse(DisasContext *s, X86DecodedInsn *decode, int src_ofs)
{
MemOp ot = decode->op[0].ot;
@ -1011,6 +1040,7 @@ static void gen_##uname(DisasContext *s, CPUX86State *env, X86DecodedInsn *decod
VSIB_AVX(VPGATHERD, vpgatherd)
VSIB_AVX(VPGATHERQ, vpgatherq)
/* ADCX/ADOX do not have memory operands and can use set_cc_op. */
static void gen_ADCOX(DisasContext *s, CPUX86State *env, MemOp ot, int cc_op)
{
int opposite_cc_op;
@ -1073,8 +1103,7 @@ static void gen_ANDN(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
MemOp ot = decode->op[0].ot;
tcg_gen_andc_tl(s->T0, s->T1, s->T0);
gen_op_update1_cc(s);
set_cc_op(s, CC_OP_LOGICB + ot);
prepare_update1_cc(decode, s, CC_OP_LOGICB + ot);
}
static void gen_BEXTR(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
@ -1089,9 +1118,6 @@ static void gen_BEXTR(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
* Shifts larger than operand size get zeros.
*/
tcg_gen_ext8u_tl(s->A0, s->T1);
if (TARGET_LONG_BITS == 64 && ot == MO_32) {
tcg_gen_ext32u_tl(s->T0, s->T0);
}
tcg_gen_shr_tl(s->T0, s->T0, s->A0);
tcg_gen_movcond_tl(TCG_COND_LEU, s->T0, s->A0, bound, s->T0, zero);
@ -1105,10 +1131,10 @@ static void gen_BEXTR(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
tcg_gen_movcond_tl(TCG_COND_LEU, s->T1, s->A0, bound, s->T1, zero);
tcg_gen_andc_tl(s->T0, s->T0, s->T1);
gen_op_update1_cc(s);
set_cc_op(s, CC_OP_LOGICB + ot);
prepare_update1_cc(decode, s, CC_OP_LOGICB + ot);
}
/* BLSI do not have memory operands and can use set_cc_op. */
static void gen_BLSI(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{
MemOp ot = decode->op[0].ot;
@ -1120,6 +1146,7 @@ static void gen_BLSI(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
set_cc_op(s, CC_OP_BMILGB + ot);
}
/* BLSMSK do not have memory operands and can use set_cc_op. */
static void gen_BLSMSK(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{
MemOp ot = decode->op[0].ot;
@ -1131,6 +1158,7 @@ static void gen_BLSMSK(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode
set_cc_op(s, CC_OP_BMILGB + ot);
}
/* BLSR do not have memory operands and can use set_cc_op. */
static void gen_BLSR(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{
MemOp ot = decode->op[0].ot;
@ -1151,18 +1179,119 @@ static void gen_BZHI(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
tcg_gen_ext8u_tl(s->T1, s->T1);
tcg_gen_shl_tl(s->A0, mone, s->T1);
tcg_gen_movcond_tl(TCG_COND_LEU, s->A0, s->T1, bound, s->A0, zero);
tcg_gen_andc_tl(s->T0, s->T0, s->A0);
/*
* Note that since we're using BMILG (in order to get O
* cleared) we need to store the inverse into C.
*/
tcg_gen_setcond_tl(TCG_COND_LEU, cpu_cc_src, s->T1, bound);
tcg_gen_setcond_tl(TCG_COND_LEU, s->T1, s->T1, bound);
prepare_update2_cc(decode, s, CC_OP_BMILGB + ot);
}
tcg_gen_shl_tl(s->A0, mone, s->T1);
tcg_gen_movcond_tl(TCG_COND_LEU, s->A0, s->T1, bound, s->A0, zero);
tcg_gen_andc_tl(s->T0, s->T0, s->A0);
static void gen_CMPccXADD(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{
TCGLabel *label_top = gen_new_label();
TCGLabel *label_bottom = gen_new_label();
TCGv oldv = tcg_temp_new();
TCGv newv = tcg_temp_new();
TCGv cmpv = tcg_temp_new();
TCGCond cond;
gen_op_update1_cc(s);
set_cc_op(s, CC_OP_BMILGB + ot);
TCGv cmp_lhs, cmp_rhs;
MemOp ot, ot_full;
int jcc_op = (decode->b >> 1) & 7;
static const TCGCond cond_table[8] = {
[JCC_O] = TCG_COND_LT, /* test sign bit by comparing against 0 */
[JCC_B] = TCG_COND_LTU,
[JCC_Z] = TCG_COND_EQ,
[JCC_BE] = TCG_COND_LEU,
[JCC_S] = TCG_COND_LT, /* test sign bit by comparing against 0 */
[JCC_P] = TCG_COND_EQ, /* even parity - tests low bit of popcount */
[JCC_L] = TCG_COND_LT,
[JCC_LE] = TCG_COND_LE,
};
cond = cond_table[jcc_op];
if (decode->b & 1) {
cond = tcg_invert_cond(cond);
}
ot = decode->op[0].ot;
ot_full = ot | MO_LE;
if (jcc_op >= JCC_S) {
/*
* Sign-extend values before subtracting for S, P (zero/sign extension
* does not matter there) L, LE and their inverses.
*/
ot_full |= MO_SIGN;
}
/*
* cmpv will be moved to cc_src *after* cpu_regs[] is written back, so use
* tcg_gen_ext_tl instead of gen_ext_tl.
*/
tcg_gen_ext_tl(cmpv, cpu_regs[decode->op[1].n], ot_full);
/*
* Cmpxchg loop starts here.
* - s->T1: addition operand (from decoder)
* - s->A0: dest address (from decoder)
* - s->cc_srcT: memory operand (lhs for comparison)
* - cmpv: rhs for comparison
*/
gen_set_label(label_top);
gen_op_ld_v(s, ot_full, s->cc_srcT, s->A0);
tcg_gen_sub_tl(s->T0, s->cc_srcT, cmpv);
/* Compute the comparison result by hand, to avoid clobbering cc_*. */
switch (jcc_op) {
case JCC_O:
/* (src1 ^ src2) & (src1 ^ dst). newv is only used here for a moment */
tcg_gen_xor_tl(newv, s->cc_srcT, s->T0);
tcg_gen_xor_tl(s->tmp0, s->cc_srcT, cmpv);
tcg_gen_and_tl(s->tmp0, s->tmp0, newv);
tcg_gen_sextract_tl(s->tmp0, s->tmp0, 0, 8 << ot);
cmp_lhs = s->tmp0, cmp_rhs = tcg_constant_tl(0);
break;
case JCC_P:
tcg_gen_ext8u_tl(s->tmp0, s->T0);
tcg_gen_ctpop_tl(s->tmp0, s->tmp0);
tcg_gen_andi_tl(s->tmp0, s->tmp0, 1);
cmp_lhs = s->tmp0, cmp_rhs = tcg_constant_tl(0);
break;
case JCC_S:
tcg_gen_sextract_tl(s->tmp0, s->T0, 0, 8 << ot);
cmp_lhs = s->tmp0, cmp_rhs = tcg_constant_tl(0);
break;
default:
cmp_lhs = s->cc_srcT, cmp_rhs = cmpv;
break;
}
/* Compute new value: if condition does not hold, just store back s->cc_srcT */
tcg_gen_add_tl(newv, s->cc_srcT, s->T1);
tcg_gen_movcond_tl(cond, newv, cmp_lhs, cmp_rhs, newv, s->cc_srcT);
tcg_gen_atomic_cmpxchg_tl(oldv, s->A0, s->cc_srcT, newv, s->mem_index, ot_full);
/* Exit unconditionally if cmpxchg succeeded. */
tcg_gen_brcond_tl(TCG_COND_EQ, oldv, s->cc_srcT, label_bottom);
/* Try again if there was actually a store to make. */
tcg_gen_brcond_tl(cond, cmp_lhs, cmp_rhs, label_top);
gen_set_label(label_bottom);
/* Store old value to registers only after a successful store. */
gen_writeback(s, decode, 1, s->cc_srcT);
decode->cc_dst = s->T0;
decode->cc_src = cmpv;
decode->cc_op = CC_OP_SUBB + ot;
}
static void gen_CRC32(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
@ -1242,9 +1371,7 @@ static void gen_LDMXCSR(DisasContext *s, CPUX86State *env, X86DecodedInsn *decod
static void gen_MASKMOV(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{
tcg_gen_mov_tl(s->A0, cpu_regs[R_EDI]);
gen_extu(s->aflag, s->A0);
gen_add_A0_ds_seg(s);
gen_lea_v_seg(s, s->aflag, cpu_regs[R_EDI], R_DS, s->override);
if (s->prefix & PREFIX_DATA) {
gen_helper_maskmov_xmm(tcg_env, OP_PTR1, OP_PTR2, s->A0);
@ -1355,7 +1482,8 @@ static void gen_MULX(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
/* low part of result in VEX.vvvv, high in MODRM */
switch (ot) {
default:
case MO_32:
#ifdef TARGET_X86_64
tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T1);
tcg_gen_mulu2_i32(s->tmp2_i32, s->tmp3_i32,
@ -1363,13 +1491,15 @@ static void gen_MULX(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
tcg_gen_extu_i32_tl(cpu_regs[s->vex_v], s->tmp2_i32);
tcg_gen_extu_i32_tl(s->T0, s->tmp3_i32);
break;
#ifdef TARGET_X86_64
case MO_64:
tcg_gen_mulu2_i64(cpu_regs[s->vex_v], s->T0, s->T0, s->T1);
break;
#endif
}
case MO_64:
#endif
tcg_gen_mulu2_tl(cpu_regs[s->vex_v], s->T0, s->T0, s->T1);
break;
default:
g_assert_not_reached();
}
}
static void gen_PALIGNR(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
@ -1432,19 +1562,11 @@ static void gen_PCMPISTRM(DisasContext *s, CPUX86State *env, X86DecodedInsn *dec
static void gen_PDEP(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{
MemOp ot = decode->op[1].ot;
if (ot < MO_64) {
tcg_gen_ext32u_tl(s->T0, s->T0);
}
gen_helper_pdep(s->T0, s->T0, s->T1);
}
static void gen_PEXT(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{
MemOp ot = decode->op[1].ot;
if (ot < MO_64) {
tcg_gen_ext32u_tl(s->T0, s->T0);
}
gen_helper_pext(s->T0, s->T0, s->T1);
}
@ -1772,14 +1894,24 @@ static void gen_PSLLDQ_i(DisasContext *s, CPUX86State *env, X86DecodedInsn *deco
static void gen_RORX(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
{
MemOp ot = decode->op[0].ot;
int b = decode->immediate;
int mask = ot == MO_64 ? 63 : 31;
int b = decode->immediate & mask;
if (ot == MO_64) {
tcg_gen_rotri_tl(s->T0, s->T0, b & 63);
} else {
switch (ot) {
case MO_32:
#ifdef TARGET_X86_64
tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
tcg_gen_rotri_i32(s->tmp2_i32, s->tmp2_i32, b & 31);
tcg_gen_rotri_i32(s->tmp2_i32, s->tmp2_i32, b);
tcg_gen_extu_i32_tl(s->T0, s->tmp2_i32);
break;
case MO_64:
#endif
tcg_gen_rotri_tl(s->T0, s->T0, b);
break;
default:
g_assert_not_reached();
}
}
@ -1790,9 +1922,6 @@ static void gen_SARX(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
mask = ot == MO_64 ? 63 : 31;
tcg_gen_andi_tl(s->T1, s->T1, mask);
if (ot != MO_64) {
tcg_gen_ext32s_tl(s->T0, s->T0);
}
tcg_gen_sar_tl(s->T0, s->T0, s->T1);
}
@ -1867,9 +1996,6 @@ static void gen_SHRX(DisasContext *s, CPUX86State *env, X86DecodedInsn *decode)
mask = ot == MO_64 ? 63 : 31;
tcg_gen_andi_tl(s->T1, s->T1, mask);
if (ot != MO_64) {
tcg_gen_ext32u_tl(s->T0, s->T0);
}
tcg_gen_shr_tl(s->T0, s->T0, s->T1);
}

7
target/i386/tcg/excp_helper.c
View File

@ -28,7 +28,7 @@
G_NORETURN void helper_raise_interrupt(CPUX86State *env, int intno,
int next_eip_addend)
{
raise_interrupt(env, intno, 1, 0, next_eip_addend);
raise_interrupt(env, intno, next_eip_addend);
}
G_NORETURN void helper_raise_exception(CPUX86State *env, int exception_index)
@ -112,10 +112,9 @@ void raise_interrupt2(CPUX86State *env, int intno,
/* shortcuts to generate exceptions */
G_NORETURN void raise_interrupt(CPUX86State *env, int intno, int is_int,
int error_code, int next_eip_addend)
G_NORETURN void raise_interrupt(CPUX86State *env, int intno, int next_eip_addend)
{
raise_interrupt2(env, intno, is_int, error_code, next_eip_addend, 0);
raise_interrupt2(env, intno, 1, 0, next_eip_addend, 0);
}
G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index,

10
target/i386/tcg/fpu_helper.c
View File

@ -484,9 +484,8 @@ void helper_fcomi_ST0_FT0(CPUX86State *env)
FloatRelation ret;
ret = floatx80_compare(ST0, FT0, &env->fp_status);
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
CC_SRC = eflags;
eflags = cpu_cc_compute_all(env) & ~(CC_Z | CC_P | CC_C);
CC_SRC = eflags | fcomi_ccval[ret + 1];
merge_exception_flags(env, old_flags);
}
@ -497,9 +496,8 @@ void helper_fucomi_ST0_FT0(CPUX86State *env)
FloatRelation ret;
ret = floatx80_compare_quiet(ST0, FT0, &env->fp_status);
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = (eflags & ~(CC_Z | CC_P | CC_C)) | fcomi_ccval[ret + 1];
CC_SRC = eflags;
eflags = cpu_cc_compute_all(env) & ~(CC_Z | CC_P | CC_C);
CC_SRC = eflags | fcomi_ccval[ret + 1];
merge_exception_flags(env, old_flags);
}

3
target/i386/tcg/helper-tcg.h
View File

@ -65,8 +65,7 @@ G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index,
int error_code);
G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index,
int error_code, uintptr_t retaddr);
G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int is_int,
int error_code, int next_eip_addend);
G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int next_eip_addend);
G_NORETURN void handle_unaligned_access(CPUX86State *env, vaddr vaddr,
MMUAccessType access_type,
uintptr_t retaddr);

8
target/i386/tcg/int_helper.c
View File

@ -190,7 +190,7 @@ void helper_aaa(CPUX86State *env)
int al, ah, af;
int eflags;
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = cpu_cc_compute_all(env);
af = eflags & CC_A;
al = env->regs[R_EAX] & 0xff;
ah = (env->regs[R_EAX] >> 8) & 0xff;
@ -214,7 +214,7 @@ void helper_aas(CPUX86State *env)
int al, ah, af;
int eflags;
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = cpu_cc_compute_all(env);
af = eflags & CC_A;
al = env->regs[R_EAX] & 0xff;
ah = (env->regs[R_EAX] >> 8) & 0xff;
@ -237,7 +237,7 @@ void helper_daa(CPUX86State *env)
int old_al, al, af, cf;
int eflags;
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = cpu_cc_compute_all(env);
cf = eflags & CC_C;
af = eflags & CC_A;
old_al = al = env->regs[R_EAX] & 0xff;
@ -264,7 +264,7 @@ void helper_das(CPUX86State *env)
int al, al1, af, cf;
int eflags;
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = cpu_cc_compute_all(env);
cf = eflags & CC_C;
af = eflags & CC_A;
al = env->regs[R_EAX] & 0xff;

4
target/i386/tcg/misc_helper.c
View File

@ -41,9 +41,9 @@ void helper_into(CPUX86State *env, int next_eip_addend)
{
int eflags;
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = cpu_cc_compute_all(env);
if (eflags & CC_O) {
raise_interrupt(env, EXCP04_INTO, 1, 0, next_eip_addend);
raise_interrupt(env, EXCP04_INTO, next_eip_addend);
}
}

8
target/i386/tcg/seg_helper.c
View File

@ -2230,7 +2230,7 @@ target_ulong helper_lsl(CPUX86State *env, target_ulong selector1)
int rpl, dpl, cpl, type;
selector = selector1 & 0xffff;
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = cpu_cc_compute_all(env);
if ((selector & 0xfffc) == 0) {
goto fail;
}
@ -2277,7 +2277,7 @@ target_ulong helper_lar(CPUX86State *env, target_ulong selector1)
int rpl, dpl, cpl, type;
selector = selector1 & 0xffff;
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = cpu_cc_compute_all(env);
if ((selector & 0xfffc) == 0) {
goto fail;
}
@ -2326,7 +2326,7 @@ void helper_verr(CPUX86State *env, target_ulong selector1)
int rpl, dpl, cpl;
selector = selector1 & 0xffff;
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = cpu_cc_compute_all(env);
if ((selector & 0xfffc) == 0) {
goto fail;
}
@ -2364,7 +2364,7 @@ void helper_verw(CPUX86State *env, target_ulong selector1)
int rpl, dpl, cpl;
selector = selector1 & 0xffff;
eflags = cpu_cc_compute_all(env, CC_OP);
eflags = cpu_cc_compute_all(env);
if ((selector & 0xfffc) == 0) {
goto fail;
}

160
target/i386/tcg/translate.c
View File

@ -122,6 +122,7 @@ typedef struct DisasContext {
int cpuid_ext3_features;
int cpuid_7_0_ebx_features;
int cpuid_7_0_ecx_features;
int cpuid_7_1_eax_features;
int cpuid_xsave_features;
/* TCG local temps */
@ -522,9 +523,9 @@ void gen_op_add_reg_im(DisasContext *s, MemOp size, int reg, int32_t val)
gen_op_mov_reg_v(s, size, reg, s->tmp0);
}
static inline void gen_op_add_reg_T0(DisasContext *s, MemOp size, int reg)
static inline void gen_op_add_reg(DisasContext *s, MemOp size, int reg, TCGv val)
{
tcg_gen_add_tl(s->tmp0, cpu_regs[reg], s->T0);
tcg_gen_add_tl(s->tmp0, cpu_regs[reg], val);
gen_op_mov_reg_v(s, size, reg, s->tmp0);
}
@ -635,17 +636,17 @@ static TCGv eip_cur_tl(DisasContext *s)
}
}
/* Compute SEG:REG into A0. SEG is selected from the override segment
/* Compute SEG:REG into DEST. SEG is selected from the override segment
(OVR_SEG) and the default segment (DEF_SEG). OVR_SEG may be -1 to
indicate no override. */
static void gen_lea_v_seg(DisasContext *s, MemOp aflag, TCGv a0,
int def_seg, int ovr_seg)
static void gen_lea_v_seg_dest(DisasContext *s, MemOp aflag, TCGv dest, TCGv a0,
int def_seg, int ovr_seg)
{
switch (aflag) {
#ifdef TARGET_X86_64
case MO_64:
if (ovr_seg < 0) {
tcg_gen_mov_tl(s->A0, a0);
tcg_gen_mov_tl(dest, a0);
return;
}
break;
@ -656,14 +657,14 @@ static void gen_lea_v_seg(DisasContext *s, MemOp aflag, TCGv a0,
ovr_seg = def_seg;
}
if (ovr_seg < 0) {
tcg_gen_ext32u_tl(s->A0, a0);
tcg_gen_ext32u_tl(dest, a0);
return;
}
break;
case MO_16:
/* 16 bit address */
tcg_gen_ext16u_tl(s->A0, a0);
a0 = s->A0;
tcg_gen_ext16u_tl(dest, a0);
a0 = dest;
if (ovr_seg < 0) {
if (ADDSEG(s)) {
ovr_seg = def_seg;
@ -680,17 +681,23 @@ static void gen_lea_v_seg(DisasContext *s, MemOp aflag, TCGv a0,
TCGv seg = cpu_seg_base[ovr_seg];
if (aflag == MO_64) {
tcg_gen_add_tl(s->A0, a0, seg);
tcg_gen_add_tl(dest, a0, seg);
} else if (CODE64(s)) {
tcg_gen_ext32u_tl(s->A0, a0);
tcg_gen_add_tl(s->A0, s->A0, seg);
tcg_gen_ext32u_tl(dest, a0);
tcg_gen_add_tl(dest, dest, seg);
} else {
tcg_gen_add_tl(s->A0, a0, seg);
tcg_gen_ext32u_tl(s->A0, s->A0);
tcg_gen_add_tl(dest, a0, seg);
tcg_gen_ext32u_tl(dest, dest);
}
}
}
static void gen_lea_v_seg(DisasContext *s, MemOp aflag, TCGv a0,
int def_seg, int ovr_seg)
{
gen_lea_v_seg_dest(s, aflag, s->A0, a0, def_seg, ovr_seg);
}
static inline void gen_string_movl_A0_ESI(DisasContext *s)
{
gen_lea_v_seg(s, s->aflag, cpu_regs[R_ESI], R_DS, s->override);
@ -701,10 +708,12 @@ static inline void gen_string_movl_A0_EDI(DisasContext *s)
gen_lea_v_seg(s, s->aflag, cpu_regs[R_EDI], R_ES, -1);
}
static inline void gen_op_movl_T0_Dshift(DisasContext *s, MemOp ot)
static inline TCGv gen_compute_Dshift(DisasContext *s, MemOp ot)
{
tcg_gen_ld32s_tl(s->T0, tcg_env, offsetof(CPUX86State, df));
tcg_gen_shli_tl(s->T0, s->T0, ot);
TCGv dshift = tcg_temp_new();
tcg_gen_ld32s_tl(dshift, tcg_env, offsetof(CPUX86State, df));
tcg_gen_shli_tl(dshift, dshift, ot);
return dshift;
};
static TCGv gen_ext_tl(TCGv dst, TCGv src, MemOp size, bool sign)
@ -712,6 +721,9 @@ static TCGv gen_ext_tl(TCGv dst, TCGv src, MemOp size, bool sign)
if (size == MO_TL) {
return src;
}
if (!dst) {
dst = tcg_temp_new();
}
tcg_gen_ext_tl(dst, src, size | (sign ? MO_SIGN : 0));
return dst;
}
@ -728,9 +740,9 @@ static void gen_exts(MemOp ot, TCGv reg)
static void gen_op_j_ecx(DisasContext *s, TCGCond cond, TCGLabel *label1)
{
tcg_gen_mov_tl(s->tmp0, cpu_regs[R_ECX]);
gen_extu(s->aflag, s->tmp0);
tcg_gen_brcondi_tl(cond, s->tmp0, 0, label1);
TCGv tmp = gen_ext_tl(NULL, cpu_regs[R_ECX], s->aflag, false);
tcg_gen_brcondi_tl(cond, tmp, 0, label1);
}
static inline void gen_op_jz_ecx(DisasContext *s, TCGLabel *label1)
@ -812,13 +824,16 @@ static bool gen_check_io(DisasContext *s, MemOp ot, TCGv_i32 port,
static void gen_movs(DisasContext *s, MemOp ot)
{
TCGv dshift;
gen_string_movl_A0_ESI(s);
gen_op_ld_v(s, ot, s->T0, s->A0);
gen_string_movl_A0_EDI(s);
gen_op_st_v(s, ot, s->T0, s->A0);
gen_op_movl_T0_Dshift(s, ot);
gen_op_add_reg_T0(s, s->aflag, R_ESI);
gen_op_add_reg_T0(s, s->aflag, R_EDI);
dshift = gen_compute_Dshift(s, ot);
gen_op_add_reg(s, s->aflag, R_ESI, dshift);
gen_op_add_reg(s, s->aflag, R_EDI, dshift);
}
static void gen_op_update1_cc(DisasContext *s)
@ -851,22 +866,22 @@ static void gen_op_update_neg_cc(DisasContext *s)
tcg_gen_movi_tl(s->cc_srcT, 0);
}
/* compute all eflags to cc_src */
static void gen_compute_eflags(DisasContext *s)
/* compute all eflags to reg */
static void gen_mov_eflags(DisasContext *s, TCGv reg)
{
TCGv zero, dst, src1, src2;
TCGv dst, src1, src2;
TCGv_i32 cc_op;
int live, dead;
if (s->cc_op == CC_OP_EFLAGS) {
tcg_gen_mov_tl(reg, cpu_cc_src);
return;
}
if (s->cc_op == CC_OP_CLR) {
tcg_gen_movi_tl(cpu_cc_src, CC_Z | CC_P);
set_cc_op(s, CC_OP_EFLAGS);
tcg_gen_movi_tl(reg, CC_Z | CC_P);
return;
}
zero = NULL;
dst = cpu_cc_dst;
src1 = cpu_cc_src;
src2 = cpu_cc_src2;
@ -875,7 +890,7 @@ static void gen_compute_eflags(DisasContext *s)
live = cc_op_live[s->cc_op] & ~USES_CC_SRCT;
dead = live ^ (USES_CC_DST | USES_CC_SRC | USES_CC_SRC2);
if (dead) {
zero = tcg_constant_tl(0);
TCGv zero = tcg_constant_tl(0);
if (dead & USES_CC_DST) {
dst = zero;
}
@ -887,8 +902,18 @@ static void gen_compute_eflags(DisasContext *s)
}
}
gen_update_cc_op(s);
gen_helper_cc_compute_all(cpu_cc_src, dst, src1, src2, cpu_cc_op);
if (s->cc_op != CC_OP_DYNAMIC) {
cc_op = tcg_constant_i32(s->cc_op);
} else {
cc_op = cpu_cc_op;
}
gen_helper_cc_compute_all(reg, dst, src1, src2, cc_op);
}
/* compute all eflags to cc_src */
static void gen_compute_eflags(DisasContext *s)
{
gen_mov_eflags(s, cpu_cc_src);
set_cc_op(s, CC_OP_EFLAGS);
}
@ -1020,6 +1045,9 @@ static CCPrepare gen_prepare_eflags_o(DisasContext *s, TCGv reg)
case CC_OP_CLR:
case CC_OP_POPCNT:
return (CCPrepare) { .cond = TCG_COND_NEVER, .mask = -1 };
case CC_OP_MULB ... CC_OP_MULQ:
return (CCPrepare) { .cond = TCG_COND_NE,
.reg = cpu_cc_src, .mask = -1 };
default:
gen_compute_eflags(s);
return (CCPrepare) { .cond = TCG_COND_NE, .reg = cpu_cc_src,
@ -1126,10 +1154,9 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg)
if (reg == cpu_cc_src) {
reg = s->tmp0;
}
tcg_gen_shri_tl(reg, cpu_cc_src, 4); /* CC_O -> CC_S */
tcg_gen_xor_tl(reg, reg, cpu_cc_src);
tcg_gen_addi_tl(reg, cpu_cc_src, CC_O - CC_S);
cc = (CCPrepare) { .cond = TCG_COND_NE, .reg = reg,
.mask = CC_S };
.mask = CC_O };
break;
default:
case JCC_LE:
@ -1137,10 +1164,9 @@ static CCPrepare gen_prepare_cc(DisasContext *s, int b, TCGv reg)
if (reg == cpu_cc_src) {
reg = s->tmp0;
}
tcg_gen_shri_tl(reg, cpu_cc_src, 4); /* CC_O -> CC_S */
tcg_gen_xor_tl(reg, reg, cpu_cc_src);
tcg_gen_addi_tl(reg, cpu_cc_src, CC_O - CC_S);
cc = (CCPrepare) { .cond = TCG_COND_NE, .reg = reg,
.mask = CC_S | CC_Z };
.mask = CC_O | CC_Z };
break;
}
break;
@ -1239,11 +1265,9 @@ static TCGLabel *gen_jz_ecx_string(DisasContext *s)
static void gen_stos(DisasContext *s, MemOp ot)
{
gen_op_mov_v_reg(s, MO_32, s->T0, R_EAX);
gen_string_movl_A0_EDI(s);
gen_op_st_v(s, ot, s->T0, s->A0);
gen_op_movl_T0_Dshift(s, ot);
gen_op_add_reg_T0(s, s->aflag, R_EDI);
gen_op_add_reg(s, s->aflag, R_EDI, gen_compute_Dshift(s, ot));
}
static void gen_lods(DisasContext *s, MemOp ot)
@ -1251,28 +1275,33 @@ static void gen_lods(DisasContext *s, MemOp ot)
gen_string_movl_A0_ESI(s);
gen_op_ld_v(s, ot, s->T0, s->A0);
gen_op_mov_reg_v(s, ot, R_EAX, s->T0);
gen_op_movl_T0_Dshift(s, ot);
gen_op_add_reg_T0(s, s->aflag, R_ESI);
gen_op_add_reg(s, s->aflag, R_ESI, gen_compute_Dshift(s, ot));
}
static void gen_scas(DisasContext *s, MemOp ot)
{
gen_string_movl_A0_EDI(s);
gen_op_ld_v(s, ot, s->T1, s->A0);
gen_op(s, OP_CMPL, ot, R_EAX);
gen_op_movl_T0_Dshift(s, ot);
gen_op_add_reg_T0(s, s->aflag, R_EDI);
tcg_gen_mov_tl(cpu_cc_src, s->T1);
tcg_gen_mov_tl(s->cc_srcT, s->T0);
tcg_gen_sub_tl(cpu_cc_dst, s->T0, s->T1);
set_cc_op(s, CC_OP_SUBB + ot);
gen_op_add_reg(s, s->aflag, R_EDI, gen_compute_Dshift(s, ot));
}
static void gen_cmps(DisasContext *s, MemOp ot)
{
TCGv dshift;
gen_string_movl_A0_EDI(s);
gen_op_ld_v(s, ot, s->T1, s->A0);
gen_string_movl_A0_ESI(s);
gen_op(s, OP_CMPL, ot, OR_TMP0);
gen_op_movl_T0_Dshift(s, ot);
gen_op_add_reg_T0(s, s->aflag, R_ESI);
gen_op_add_reg_T0(s, s->aflag, R_EDI);
dshift = gen_compute_Dshift(s, ot);
gen_op_add_reg(s, s->aflag, R_ESI, dshift);
gen_op_add_reg(s, s->aflag, R_EDI, dshift);
}
static void gen_bpt_io(DisasContext *s, TCGv_i32 t_port, int ot)
@ -1300,8 +1329,7 @@ static void gen_ins(DisasContext *s, MemOp ot)
tcg_gen_andi_i32(s->tmp2_i32, s->tmp2_i32, 0xffff);
gen_helper_in_func(ot, s->T0, s->tmp2_i32);
gen_op_st_v(s, ot, s->T0, s->A0);
gen_op_movl_T0_Dshift(s, ot);
gen_op_add_reg_T0(s, s->aflag, R_EDI);
gen_op_add_reg(s, s->aflag, R_EDI, gen_compute_Dshift(s, ot));
gen_bpt_io(s, s->tmp2_i32, ot);
}
@ -1314,8 +1342,7 @@ static void gen_outs(DisasContext *s, MemOp ot)
tcg_gen_andi_i32(s->tmp2_i32, s->tmp2_i32, 0xffff);
tcg_gen_trunc_tl_i32(s->tmp3_i32, s->T0);
gen_helper_out_func(ot, s->tmp2_i32, s->tmp3_i32);
gen_op_movl_T0_Dshift(s, ot);
gen_op_add_reg_T0(s, s->aflag, R_ESI);
gen_op_add_reg(s, s->aflag, R_ESI, gen_compute_Dshift(s, ot));
gen_bpt_io(s, s->tmp2_i32, ot);
}
@ -2474,14 +2501,10 @@ static void gen_jcc(DisasContext *s, int b, int diff)
gen_jmp_rel(s, s->dflag, diff, 0);
}
static void gen_cmovcc1(CPUX86State *env, DisasContext *s, MemOp ot, int b,
int modrm, int reg)
static void gen_cmovcc1(DisasContext *s, int b, TCGv dest, TCGv src)
{
CCPrepare cc;
CCPrepare cc = gen_prepare_cc(s, b, s->T1);
gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
cc = gen_prepare_cc(s, b, s->T1);
if (cc.mask != -1) {
TCGv t0 = tcg_temp_new();
tcg_gen_andi_tl(t0, cc.reg, cc.mask);
@ -2491,9 +2514,7 @@ static void gen_cmovcc1(CPUX86State *env, DisasContext *s, MemOp ot, int b,
cc.reg2 = tcg_constant_tl(cc.imm);
}
tcg_gen_movcond_tl(cc.cond, s->T0, cc.reg, cc.reg2,
s->T0, cpu_regs[reg]);
gen_op_mov_reg_v(s, ot, reg, s->T0);
tcg_gen_movcond_tl(cc.cond, dest, cc.reg, cc.reg2, src, dest);
}
static inline void gen_op_movl_T0_seg(DisasContext *s, X86Seg seg_reg)
@ -2560,7 +2581,7 @@ static void gen_push_v(DisasContext *s, TCGv val)
if (!CODE64(s)) {
if (ADDSEG(s)) {
new_esp = s->tmp4;
new_esp = tcg_temp_new();
tcg_gen_mov_tl(new_esp, s->A0);
}
gen_lea_v_seg(s, a_ot, s->A0, R_SS, -1);
@ -2575,8 +2596,8 @@ static MemOp gen_pop_T0(DisasContext *s)
{
MemOp d_ot = mo_pushpop(s, s->dflag);
gen_lea_v_seg(s, mo_stacksize(s), cpu_regs[R_ESP], R_SS, -1);
gen_op_ld_v(s, d_ot, s->T0, s->A0);
gen_lea_v_seg_dest(s, mo_stacksize(s), s->T0, cpu_regs[R_ESP], R_SS, -1);
gen_op_ld_v(s, d_ot, s->T0, s->T0);
return d_ot;
}
@ -4182,7 +4203,6 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
tcg_gen_mov_tl(s->A0, cpu_regs[R_EBX]);
tcg_gen_ext8u_tl(s->T0, cpu_regs[R_EAX]);
tcg_gen_add_tl(s->A0, s->A0, s->T0);
gen_extu(s->aflag, s->A0);
gen_add_A0_ds_seg(s);
gen_op_ld_v(s, MO_8, s->T0, s->A0);
gen_op_mov_reg_v(s, MO_8, R_EAX, s->T0);
@ -4930,6 +4950,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
case 0xaa: /* stosS */
case 0xab:
ot = mo_b_d(b, dflag);
gen_op_mov_v_reg(s, MO_32, s->T0, R_EAX);
if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
gen_repz_stos(s, ot);
} else {
@ -4948,6 +4969,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
case 0xae: /* scasS */
case 0xaf:
ot = mo_b_d(b, dflag);
gen_op_mov_v_reg(s, MO_32, s->T0, R_EAX);
if (prefixes & PREFIX_REPNZ) {
gen_repz_scas(s, ot, 1);
} else if (prefixes & PREFIX_REPZ) {
@ -5201,7 +5223,9 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
ot = dflag;
modrm = x86_ldub_code(env, s);
reg = ((modrm >> 3) & 7) | REX_R(s);
gen_cmovcc1(env, s, ot, b, modrm, reg);
gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
gen_cmovcc1(s, b ^ 1, s->T0, cpu_regs[reg]);
gen_op_mov_reg_v(s, ot, reg, s->T0);
break;
/************************/
@ -5834,7 +5858,6 @@ static bool disas_insn(DisasContext *s, CPUState *cpu)
gen_update_cc_op(s);
gen_update_eip_cur(s);
tcg_gen_mov_tl(s->A0, cpu_regs[R_EAX]);
gen_extu(s->aflag, s->A0);
gen_add_A0_ds_seg(s);
gen_helper_monitor(tcg_env, s->A0);
break;
@ -6941,6 +6964,7 @@ static void i386_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
dc->cpuid_ext3_features = env->features[FEAT_8000_0001_ECX];
dc->cpuid_7_0_ebx_features = env->features[FEAT_7_0_EBX];
dc->cpuid_7_0_ecx_features = env->features[FEAT_7_0_ECX];
dc->cpuid_7_1_eax_features = env->features[FEAT_7_1_EAX];
dc->cpuid_xsave_features = env->features[FEAT_XSAVE];
dc->jmp_opt = !((cflags & CF_NO_GOTO_TB) ||
(flags & (HF_TF_MASK | HF_INHIBIT_IRQ_MASK)));

2
target/mips/meson.build
View File

@ -12,7 +12,7 @@ if have_system
subdir('sysemu')
endif
if 'CONFIG_TCG' in config_all
if 'CONFIG_TCG' in config_all_accel
subdir('tcg')
endif

2
tcg/meson.build
View File

@ -22,7 +22,7 @@ if get_option('tcg_interpreter')
tcg_ss.add(files('tci.c'))
endif
tcg_ss = tcg_ss.apply(config_targetos, strict: false)
tcg_ss = tcg_ss.apply({})
libtcg_user = static_library('tcg_user',
tcg_ss.sources() + genh,

6
tests/bench/meson.build
View File

@ -3,9 +3,9 @@ qht_bench = executable('qht-bench',
sources: 'qht-bench.c',
dependencies: [qemuutil])
qtree_bench = executable('qtree-bench',
sources: 'qtree-bench.c',
dependencies: [qemuutil])
executable('qtree-bench',
sources: 'qtree-bench.c',
dependencies: [qemuutil])
executable('atomic_add-bench',
sources: files('atomic_add-bench.c'),

4
tests/fp/meson.build
View File

@ -1,9 +1,9 @@
if 'CONFIG_TCG' not in config_all
if 'CONFIG_TCG' not in config_all_accel
subdir_done()
endif
# There are namespace pollution issues on Windows, due to osdep.h
# bringing in Windows headers that define a FLOAT128 type.
if targetos == 'windows'
if host_os == 'windows'
subdir_done()
endif

4
tests/meson.build
View File

@ -68,7 +68,7 @@ test_deps = {
'test-qht-par': qht_bench,
}
if have_tools and have_vhost_user and targetos == 'linux'
if have_tools and have_vhost_user and host_os == 'linux'
executable('vhost-user-bridge',
sources: files('vhost-user-bridge.c'),
dependencies: [qemuutil, vhost_user])
@ -76,7 +76,7 @@ endif
subdir('decode')
if 'CONFIG_TCG' in config_all
if 'CONFIG_TCG' in config_all_accel
subdir('fp')
endif

2
tests/plugin/meson.build
View File

@ -1,7 +1,7 @@
t = []
if get_option('plugins')
foreach i : ['bb', 'empty', 'insn', 'mem', 'syscall']
if targetos == 'windows'
if host_os == 'windows'
t += shared_module(i, files(i + '.c') + '../../contrib/plugins/win32_linker.c',
include_directories: '../../include/qemu',
link_depends: [win32_qemu_plugin_api_lib],

2
tests/qemu-iotests/meson.build
View File

@ -1,4 +1,4 @@
if not have_tools or targetos == 'windows'
if not have_tools or host_os == 'windows'
subdir_done()
endif

20
tests/qtest/meson.build
View File

@ -38,8 +38,8 @@ qtests_cxl = \
# for the availability of the default NICs in the tests
qtests_filter = \
(get_option('default_devices') and slirp.found() ? ['test-netfilter'] : []) + \
(get_option('default_devices') and targetos != 'windows' ? ['test-filter-mirror'] : []) + \
(get_option('default_devices') and targetos != 'windows' ? ['test-filter-redirector'] : [])
(get_option('default_devices') and host_os != 'windows' ? ['test-filter-mirror'] : []) + \
(get_option('default_devices') and host_os != 'windows' ? ['test-filter-redirector'] : [])
qtests_i386 = \
(slirp.found() ? ['pxe-test'] : []) + \
@ -48,7 +48,7 @@ qtests_i386 = \
(config_all_devices.has_key('CONFIG_ISA_TESTDEV') ? ['endianness-test'] : []) + \
(config_all_devices.has_key('CONFIG_SGA') ? ['boot-serial-test'] : []) + \
(config_all_devices.has_key('CONFIG_ISA_IPMI_KCS') ? ['ipmi-kcs-test'] : []) + \
(targetos == 'linux' and \
(host_os == 'linux' and \
config_all_devices.has_key('CONFIG_ISA_IPMI_BT') and
config_all_devices.has_key('CONFIG_IPMI_EXTERN') ? ['ipmi-bt-test'] : []) + \
(config_all_devices.has_key('CONFIG_WDT_IB700') ? ['wdt_ib700-test'] : []) + \
@ -74,7 +74,7 @@ qtests_i386 = \
(config_all_devices.has_key('CONFIG_SB16') ? ['fuzz-sb16-test'] : []) + \
(config_all_devices.has_key('CONFIG_SDHCI_PCI') ? ['fuzz-sdcard-test'] : []) + \
(config_all_devices.has_key('CONFIG_ESP_PCI') ? ['am53c974-test'] : []) + \
(targetos != 'windows' and \
(host_os != 'windows' and \
config_all_devices.has_key('CONFIG_ACPI_ERST') ? ['erst-test'] : []) + \
(config_all_devices.has_key('CONFIG_PCIE_PORT') and \
config_all_devices.has_key('CONFIG_VIRTIO_NET') and \
@ -155,8 +155,8 @@ qtests_ppc = \
qtests_filter + \
(config_all_devices.has_key('CONFIG_ISA_TESTDEV') ? ['endianness-test'] : []) + \
(config_all_devices.has_key('CONFIG_M48T59') ? ['m48t59-test'] : []) + \
(config_all.has_key('CONFIG_TCG') ? ['prom-env-test'] : []) + \
(config_all.has_key('CONFIG_TCG') ? ['boot-serial-test'] : []) + \
(config_all_accel.has_key('CONFIG_TCG') ? ['prom-env-test'] : []) + \
(config_all_accel.has_key('CONFIG_TCG') ? ['boot-serial-test'] : []) + \
['boot-order-test']
qtests_ppc64 = \
@ -213,12 +213,12 @@ qtests_arm = \
# TODO: once aarch64 TCG is fixed on ARM 32 bit host, make bios-tables-test unconditional
qtests_aarch64 = \
(cpu != 'arm' and unpack_edk2_blobs ? ['bios-tables-test'] : []) + \
(config_all.has_key('CONFIG_TCG') and config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? \
(config_all_accel.has_key('CONFIG_TCG') and config_all_devices.has_key('CONFIG_TPM_TIS_SYSBUS') ? \
['tpm-tis-device-test', 'tpm-tis-device-swtpm-test'] : []) + \
(config_all_devices.has_key('CONFIG_XLNX_ZYNQMP_ARM') ? ['xlnx-can-test', 'fuzz-xlnx-dp-test'] : []) + \
(config_all_devices.has_key('CONFIG_XLNX_VERSAL') ? ['xlnx-canfd-test', 'xlnx-versal-trng-test'] : []) + \
(config_all_devices.has_key('CONFIG_RASPI') ? ['bcm2835-dma-test'] : []) + \
(config_all.has_key('CONFIG_TCG') and \
(config_all_accel.has_key('CONFIG_TCG') and \
config_all_devices.has_key('CONFIG_TPM_TIS_I2C') ? ['tpm-tis-i2c-test'] : []) + \
['arm-cpu-features',
'numa-test',
@ -277,7 +277,7 @@ if config_all_devices.has_key('CONFIG_VIRTIO_SERIAL')
qos_test_ss.add(files('virtio-serial-test.c'))
endif
if targetos != 'windows'
if host_os != 'windows'
qos_test_ss.add(files('e1000e-test.c'))
endif
if have_virtfs
@ -310,7 +310,7 @@ qtests = {
'ivshmem-test': [rt, '../../contrib/ivshmem-server/ivshmem-server.c'],
'migration-test': migration_files,
'pxe-test': files('boot-sector.c'),
'qos-test': [chardev, io, qos_test_ss.apply(config_targetos, strict: false).sources()],
'qos-test': [chardev, io, qos_test_ss.apply({}).sources()],
'tpm-crb-swtpm-test': [io, tpmemu_files],
'tpm-crb-test': [io, tpmemu_files],
'tpm-tis-swtpm-test': [io, tpmemu_files, 'tpm-tis-util.c'],

2
tests/tcg/i386/Makefile.target
View File

@ -13,7 +13,7 @@ config-cc.mak: Makefile
I386_SRCS=$(notdir $(wildcard $(I386_SRC)/*.c))
ALL_X86_TESTS=$(I386_SRCS:.c=)
SKIP_I386_TESTS=test-i386-ssse3 test-avx test-3dnow test-mmx
SKIP_I386_TESTS=test-i386-ssse3 test-avx test-3dnow test-mmx test-flags
X86_64_TESTS:=$(filter test-i386-adcox test-i386-bmi2 $(SKIP_I386_TESTS), $(ALL_X86_TESTS))
test-i386-sse-exceptions: CFLAGS += -msse4.1 -mfpmath=sse

37
tests/tcg/i386/test-flags.c Normal file
View File

@ -0,0 +1,37 @@
#define _GNU_SOURCE
#include <sys/mman.h>
#include <signal.h>
#include <stdio.h>
#include <assert.h>
volatile unsigned long flags;
volatile unsigned long flags_after;
int *addr;
void sigsegv(int sig, siginfo_t *info, ucontext_t *uc)
{
flags = uc->uc_mcontext.gregs[REG_EFL];
mprotect(addr, 4096, PROT_READ|PROT_WRITE);
}
int main()
{
struct sigaction sa = { .sa_handler = (void *)sigsegv, .sa_flags = SA_SIGINFO };
sigaction(SIGSEGV, &sa, NULL);
/* fault in the page then protect it */
addr = mmap (NULL, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANON, -1, 0);
*addr = 0x1234;
mprotect(addr, 4096, PROT_READ);
asm("# set flags to all ones \n"
"mov $-1, %%eax \n"
"movq addr, %%rdi \n"
"sahf \n"
"sub %%eax, (%%rdi) \n"
"pushf \n"
"pop flags_after(%%rip) \n" : : : "eax", "edi", "memory");
/* OF can have any value before the SUB instruction. */
assert((flags & 0xff) == 0xd7 && (flags_after & 0x8ff) == 0x17);
}

8
tests/unit/meson.build
View File

@ -100,7 +100,7 @@ if have_block
}
if gnutls.found() and \
tasn1.found() and \
targetos != 'windows'
host_os != 'windows'
tests += {
'test-crypto-tlscredsx509': ['crypto-tls-x509-helpers.c', 'pkix_asn1_tab.c',
tasn1, crypto, gnutls],
@ -115,7 +115,7 @@ if have_block
if xts == 'private'
tests += {'test-crypto-xts': [crypto, io]}
endif
if targetos != 'windows'
if host_os != 'windows'
tests += {
'test-image-locking': [testblock],
'test-nested-aio-poll': [testblock],
@ -150,7 +150,7 @@ if have_system
# are not runnable under TSan due to a known issue.
# https://github.com/google/sanitizers/issues/1116
if not get_option('tsan')
if targetos != 'windows'
if host_os != 'windows'
tests += {
'test-char': ['socket-helpers.c', qom, io, chardev]
}
@ -162,7 +162,7 @@ if have_system
endif
endif
if have_ga and targetos == 'linux'
if have_ga and host_os == 'linux'
tests += {'test-qga': ['../qtest/libqmp.c']}
test_deps += {'test-qga': qga}
endif

10
ui/dbus-display1.xml
View File

@ -71,7 +71,7 @@
:dbus:iface:`org.qemu.Display1.Listener` interface.
-->
<method name="RegisterListener">
<?if $(env.TARGETOS) == windows?>
<?if $(env.HOST_OS) == windows?>
<arg type="ay" name="listener" direction="in">
<annotation name="org.gtk.GDBus.C.ForceGVariant" value="true"/>
</arg>
@ -370,7 +370,7 @@
</arg>
</method>
<?if $(env.TARGETOS) != windows?>
<?if $(env.HOST_OS) != windows?>
<!--
ScanoutDMABUF:
@dmabuf: the DMABUF file descriptor.
@ -694,7 +694,7 @@
:dbus:iface:`org.qemu.Display1.AudioOutListener` interface.
-->
<method name="RegisterOutListener">
<?if $(env.TARGETOS) == windows?>
<?if $(env.HOST_OS) == windows?>
<arg type="ay" name="listener" direction="in">
<annotation name="org.gtk.GDBus.C.ForceGVariant" value="true"/>
</arg>
@ -715,7 +715,7 @@
:dbus:iface:`org.qemu.Display1.AudioInListener` interface.
-->
<method name="RegisterInListener">
<?if $(env.TARGETOS) == windows?>
<?if $(env.HOST_OS) == windows?>
<arg type="ay" name="listener" direction="in">
<annotation name="org.gtk.GDBus.C.ForceGVariant" value="true"/>
</arg>
@ -976,7 +976,7 @@
The current handler, if any, will be replaced.
-->
<method name="Register">
<?if $(env.TARGETOS) == windows?>
<?if $(env.HOST_OS) == windows?>
<arg type="ay" name="listener" direction="in">
<annotation name="org.gtk.GDBus.C.ForceGVariant" value="true"/>
</arg>

17
ui/meson.build
View File

@ -25,10 +25,9 @@ endif
system_ss.add([spice_headers, files('spice-module.c')])
system_ss.add(when: spice_protocol, if_true: files('vdagent.c'))
system_ss.add(when: 'CONFIG_LINUX', if_true: files(
'input-linux.c',
'udmabuf.c',
))
if host_os == 'linux'
system_ss.add(files('input-linux.c', 'udmabuf.c'))
endif
system_ss.add(when: cocoa, if_true: files('cocoa.m'))
vnc_ss = ss.source_set()
@ -76,7 +75,7 @@ endif
if dbus_display
dbus_ss = ss.source_set()
env = environment()
env.set('TARGETOS', targetos)
env.set('HOST_OS', host_os)
xml = custom_target('dbus-display preprocess',
input: 'dbus-display1.xml',
output: 'dbus-display1.xml',
@ -106,7 +105,9 @@ if dbus_display
endif
if gtk.found()
system_ss.add(when: 'CONFIG_WIN32', if_true: files('win32-kbd-hook.c'))
if host_os == 'windows'
system_ss.add(files('win32-kbd-hook.c'))
endif
gtk_ss = ss.source_set()
gtk_ss.add(gtk, vte, pixman, files('gtk.c'))
@ -120,7 +121,9 @@ if gtk.found()
endif
if sdl.found()
system_ss.add(when: 'CONFIG_WIN32', if_true: files('win32-kbd-hook.c'))
if host_os == 'windows'
system_ss.add(files('win32-kbd-hook.c'))
endif
sdl_ss = ss.source_set()
sdl_ss.add(sdl, sdl_image, pixman, glib, files(

58
util/meson.build
View File

@ -3,28 +3,31 @@ util_ss.add(files('thread-context.c'), numa)
if not config_host_data.get('CONFIG_ATOMIC64')
util_ss.add(files('atomic64.c'))
endif
util_ss.add(when: 'CONFIG_POSIX', if_true: files('aio-posix.c'))
util_ss.add(when: 'CONFIG_POSIX', if_true: files('fdmon-poll.c'))
if config_host_data.get('CONFIG_EPOLL_CREATE1')
util_ss.add(files('fdmon-epoll.c'))
if host_os != 'windows'
util_ss.add(files('aio-posix.c'))
util_ss.add(files('fdmon-poll.c'))
if config_host_data.get('CONFIG_EPOLL_CREATE1')
util_ss.add(files('fdmon-epoll.c'))
endif
util_ss.add(files('compatfd.c'))
util_ss.add(files('event_notifier-posix.c'))
util_ss.add(files('mmap-alloc.c'))
freebsd_dep = []
if host_os == 'freebsd'
freebsd_dep = util
endif
util_ss.add(files('oslib-posix.c'), freebsd_dep)
util_ss.add(files('qemu-thread-posix.c'))
util_ss.add(files('memfd.c'))
util_ss.add(files('drm.c'))
else
util_ss.add(files('aio-win32.c'))
util_ss.add(files('event_notifier-win32.c'))
util_ss.add(files('oslib-win32.c'))
util_ss.add(files('qemu-thread-win32.c'))
util_ss.add(winmm, pathcch)
endif
util_ss.add(when: linux_io_uring, if_true: files('fdmon-io_uring.c'))
util_ss.add(when: 'CONFIG_POSIX', if_true: files('compatfd.c'))
util_ss.add(when: 'CONFIG_POSIX', if_true: files('event_notifier-posix.c'))
util_ss.add(when: 'CONFIG_POSIX', if_true: files('mmap-alloc.c'))
freebsd_dep = []
if targetos == 'freebsd'
freebsd_dep = util
endif
util_ss.add(when: 'CONFIG_POSIX', if_true: [files('oslib-posix.c'), freebsd_dep])
util_ss.add(when: 'CONFIG_POSIX', if_true: files('qemu-thread-posix.c'))
util_ss.add(when: 'CONFIG_POSIX', if_true: files('memfd.c'))
util_ss.add(when: 'CONFIG_WIN32', if_true: files('aio-win32.c'))
util_ss.add(when: 'CONFIG_WIN32', if_true: files('event_notifier-win32.c'))
util_ss.add(when: 'CONFIG_WIN32', if_true: files('oslib-win32.c'))
util_ss.add(when: 'CONFIG_WIN32', if_true: files('qemu-thread-win32.c'))
util_ss.add(when: 'CONFIG_WIN32', if_true: winmm)
util_ss.add(when: 'CONFIG_WIN32', if_true: pathcch)
if glib_has_gslice
util_ss.add(files('qtree.c'))
endif
@ -56,7 +59,6 @@ util_ss.add(files('reserved-region.c'))
util_ss.add(files('stats64.c'))
util_ss.add(files('systemd.c'))
util_ss.add(files('transactions.c'))
util_ss.add(when: 'CONFIG_POSIX', if_true: files('drm.c'))
util_ss.add(files('guest-random.c'))
util_ss.add(files('yank.c'))
util_ss.add(files('int128.c'))
@ -71,7 +73,9 @@ endif
if have_system
util_ss.add(files('crc-ccitt.c'))
util_ss.add(when: gio, if_true: files('dbus.c'))
util_ss.add(when: 'CONFIG_LINUX', if_true: files('userfaultfd.c'))
if host_os == 'linux'
util_ss.add(files('userfaultfd.c'))
endif
endif
if have_block or have_ga
@ -92,9 +96,6 @@ if have_block
util_ss.add(files('iova-tree.c'))
util_ss.add(files('iov.c', 'uri.c'))
util_ss.add(files('nvdimm-utils.c'))
util_ss.add(when: 'CONFIG_LINUX', if_true: [
files('vhost-user-server.c'), vhost_user
])
util_ss.add(files('block-helpers.c'))
util_ss.add(files('qemu-coroutine-sleep.c'))
util_ss.add(files('qemu-co-shared-resource.c'))
@ -107,8 +108,11 @@ if have_block
else
util_ss.add(files('filemonitor-stub.c'))
endif
util_ss.add(when: 'CONFIG_LINUX', if_true: files('vfio-helpers.c'))
util_ss.add(when: 'CONFIG_LINUX', if_true: files('chardev_open.c'))
if host_os == 'linux'
util_ss.add(files('vhost-user-server.c'), vhost_user)
util_ss.add(files('vfio-helpers.c'))
util_ss.add(files('chardev_open.c'))
endif
endif
if cpu == 'aarch64'