mirror of https://github.com/proxmox/mirror_qemu
target/arm: Remove VLDR/VSTR/VLDM/VSTM use of cpu_F0s and cpu_F0d
Expand out the sequences in the new decoder VLDR/VSTR/VLDM/VSTM trans functions which perform the memory accesses by going via the TCG globals cpu_F0s and cpu_F0d, to use local TCG temps instead. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>master
parent
fa288de272
commit
3993d0407d
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@ -857,7 +857,7 @@ static bool trans_VMOV_64_dp(DisasContext *s, arg_VMOV_64_sp *a)
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static bool trans_VLDR_VSTR_sp(DisasContext *s, arg_VLDR_VSTR_sp *a)
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{
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uint32_t offset;
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TCGv_i32 addr;
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TCGv_i32 addr, tmp;
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if (!vfp_access_check(s)) {
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return true;
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@ -876,13 +876,15 @@ static bool trans_VLDR_VSTR_sp(DisasContext *s, arg_VLDR_VSTR_sp *a)
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addr = load_reg(s, a->rn);
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}
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tcg_gen_addi_i32(addr, addr, offset);
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tmp = tcg_temp_new_i32();
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if (a->l) {
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gen_vfp_ld(s, false, addr);
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gen_mov_vreg_F0(false, a->vd);
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gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
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neon_store_reg32(tmp, a->vd);
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} else {
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gen_mov_F0_vreg(false, a->vd);
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gen_vfp_st(s, false, addr);
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neon_load_reg32(tmp, a->vd);
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gen_aa32_st32(s, tmp, addr, get_mem_index(s));
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}
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tcg_temp_free_i32(tmp);
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tcg_temp_free_i32(addr);
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return true;
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@ -892,6 +894,7 @@ static bool trans_VLDR_VSTR_dp(DisasContext *s, arg_VLDR_VSTR_sp *a)
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{
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uint32_t offset;
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TCGv_i32 addr;
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TCGv_i64 tmp;
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/* UNDEF accesses to D16-D31 if they don't exist */
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if (!dc_isar_feature(aa32_fp_d32, s) && (a->vd & 0x10)) {
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@ -915,13 +918,15 @@ static bool trans_VLDR_VSTR_dp(DisasContext *s, arg_VLDR_VSTR_sp *a)
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addr = load_reg(s, a->rn);
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}
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tcg_gen_addi_i32(addr, addr, offset);
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tmp = tcg_temp_new_i64();
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if (a->l) {
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gen_vfp_ld(s, true, addr);
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gen_mov_vreg_F0(true, a->vd);
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gen_aa32_ld64(s, tmp, addr, get_mem_index(s));
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neon_store_reg64(tmp, a->vd);
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} else {
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gen_mov_F0_vreg(true, a->vd);
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gen_vfp_st(s, true, addr);
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neon_load_reg64(tmp, a->vd);
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gen_aa32_st64(s, tmp, addr, get_mem_index(s));
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}
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tcg_temp_free_i64(tmp);
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tcg_temp_free_i32(addr);
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return true;
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@ -930,7 +935,7 @@ static bool trans_VLDR_VSTR_dp(DisasContext *s, arg_VLDR_VSTR_sp *a)
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static bool trans_VLDM_VSTM_sp(DisasContext *s, arg_VLDM_VSTM_sp *a)
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{
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uint32_t offset;
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TCGv_i32 addr;
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TCGv_i32 addr, tmp;
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int i, n;
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n = a->imm;
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@ -976,18 +981,20 @@ static bool trans_VLDM_VSTM_sp(DisasContext *s, arg_VLDM_VSTM_sp *a)
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}
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offset = 4;
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tmp = tcg_temp_new_i32();
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for (i = 0; i < n; i++) {
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if (a->l) {
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/* load */
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gen_vfp_ld(s, false, addr);
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gen_mov_vreg_F0(false, a->vd + i);
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gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
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neon_store_reg32(tmp, a->vd + i);
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} else {
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/* store */
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gen_mov_F0_vreg(false, a->vd + i);
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gen_vfp_st(s, false, addr);
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neon_load_reg32(tmp, a->vd + i);
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gen_aa32_st32(s, tmp, addr, get_mem_index(s));
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}
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tcg_gen_addi_i32(addr, addr, offset);
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}
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tcg_temp_free_i32(tmp);
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if (a->w) {
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/* writeback */
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if (a->p) {
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@ -1006,6 +1013,7 @@ static bool trans_VLDM_VSTM_dp(DisasContext *s, arg_VLDM_VSTM_dp *a)
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{
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uint32_t offset;
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TCGv_i32 addr;
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TCGv_i64 tmp;
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int i, n;
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n = a->imm >> 1;
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@ -1056,18 +1064,20 @@ static bool trans_VLDM_VSTM_dp(DisasContext *s, arg_VLDM_VSTM_dp *a)
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}
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offset = 8;
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tmp = tcg_temp_new_i64();
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for (i = 0; i < n; i++) {
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if (a->l) {
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/* load */
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gen_vfp_ld(s, true, addr);
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gen_mov_vreg_F0(true, a->vd + i);
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gen_aa32_ld64(s, tmp, addr, get_mem_index(s));
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neon_store_reg64(tmp, a->vd + i);
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} else {
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/* store */
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gen_mov_F0_vreg(true, a->vd + i);
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gen_vfp_st(s, true, addr);
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neon_load_reg64(tmp, a->vd + i);
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gen_aa32_st64(s, tmp, addr, get_mem_index(s));
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}
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tcg_gen_addi_i32(addr, addr, offset);
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}
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tcg_temp_free_i64(tmp);
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if (a->w) {
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/* writeback */
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if (a->p) {
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@ -1522,24 +1522,6 @@ VFP_GEN_FIX(uhto, )
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VFP_GEN_FIX(ulto, )
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#undef VFP_GEN_FIX
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static inline void gen_vfp_ld(DisasContext *s, int dp, TCGv_i32 addr)
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{
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if (dp) {
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gen_aa32_ld64(s, cpu_F0d, addr, get_mem_index(s));
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} else {
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gen_aa32_ld32u(s, cpu_F0s, addr, get_mem_index(s));
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}
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}
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static inline void gen_vfp_st(DisasContext *s, int dp, TCGv_i32 addr)
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{
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if (dp) {
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gen_aa32_st64(s, cpu_F0d, addr, get_mem_index(s));
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} else {
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gen_aa32_st32(s, cpu_F0s, addr, get_mem_index(s));
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}
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}
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static inline long vfp_reg_offset(bool dp, unsigned reg)
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{
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if (dp) {
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