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microblaze: Speed up base + index addressing mode 

Speed up reg + reg addressing mode when any of the regs is r0.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
master
Edgar E. Iglesias 2010-07-24 23:25:49 +02:00 committed by Edgar E. Iglesias
parent b2565c694a
commit 4b5ef0b50d
1 changed files with 7 additions and 0 deletions
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7
target-microblaze/translate.c
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@ -788,6 +788,13 @@ static inline TCGv *compute_ldst_addr(DisasContext *dc, TCGv *t)
/* Treat the fast cases first. */
if (!dc->type_b) {
/* If any of the regs is r0, return a ptr to the other. */
if (dc->ra == 0) {
return &cpu_R[dc->rb];
} else if (dc->rb == 0) {
return &cpu_R[dc->ra];
}
*t = tcg_temp_new();
tcg_gen_add_tl(*t, cpu_R[dc->ra], cpu_R[dc->rb]);
return t;