mirror of https://github.com/proxmox/mirror_qemu
target/mips: msa: Split helpers for <NLOC|NLZC>.<B|H|W|D>
Achieves clearer code and slightly better performance. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1569415572-19635-8-git-send-email-aleksandar.markovic@rt-rk.com>master
parent
05aa7e934b
commit
81c4b05995
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@ -777,6 +777,18 @@ DEF_HELPER_FLAGS_3(wrdsp, 0, void, tl, tl, env)
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DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env)
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/* MIPS SIMD Architecture */
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DEF_HELPER_3(msa_nloc_b, void, env, i32, i32)
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DEF_HELPER_3(msa_nloc_h, void, env, i32, i32)
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DEF_HELPER_3(msa_nloc_w, void, env, i32, i32)
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DEF_HELPER_3(msa_nloc_d, void, env, i32, i32)
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DEF_HELPER_3(msa_nlzc_b, void, env, i32, i32)
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DEF_HELPER_3(msa_nlzc_h, void, env, i32, i32)
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DEF_HELPER_3(msa_nlzc_w, void, env, i32, i32)
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DEF_HELPER_3(msa_nlzc_d, void, env, i32, i32)
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DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_nori_b, void, env, i32, i32, i32)
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@ -935,8 +947,6 @@ DEF_HELPER_4(msa_bmz_v, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_bsel_v, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_fill_df, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_pcnt_df, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_nloc_df, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_nlzc_df, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_copy_s_b, void, env, i32, i32, i32)
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DEF_HELPER_4(msa_copy_s_h, void, env, i32, i32, i32)
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@ -65,7 +65,147 @@
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* +---------------+----------------------------------------------------------+
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*/
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/* TODO: insert Bit Count group helpers here */
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static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg)
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{
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uint64_t x, y;
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int n, c;
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x = UNSIGNED(arg, df);
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n = DF_BITS(df);
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c = DF_BITS(df) / 2;
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do {
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y = x >> c;
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if (y != 0) {
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n = n - c;
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x = y;
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}
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c = c >> 1;
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} while (c != 0);
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return n - x;
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}
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static inline int64_t msa_nloc_df(uint32_t df, int64_t arg)
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{
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return msa_nlzc_df(df, UNSIGNED((~arg), df));
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}
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void helper_msa_nloc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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pwd->b[0] = msa_nloc_df(DF_BYTE, pws->b[0]);
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pwd->b[1] = msa_nloc_df(DF_BYTE, pws->b[1]);
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pwd->b[2] = msa_nloc_df(DF_BYTE, pws->b[2]);
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pwd->b[3] = msa_nloc_df(DF_BYTE, pws->b[3]);
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pwd->b[4] = msa_nloc_df(DF_BYTE, pws->b[4]);
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pwd->b[5] = msa_nloc_df(DF_BYTE, pws->b[5]);
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pwd->b[6] = msa_nloc_df(DF_BYTE, pws->b[6]);
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pwd->b[7] = msa_nloc_df(DF_BYTE, pws->b[7]);
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pwd->b[8] = msa_nloc_df(DF_BYTE, pws->b[8]);
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pwd->b[9] = msa_nloc_df(DF_BYTE, pws->b[9]);
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pwd->b[10] = msa_nloc_df(DF_BYTE, pws->b[10]);
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pwd->b[11] = msa_nloc_df(DF_BYTE, pws->b[11]);
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pwd->b[12] = msa_nloc_df(DF_BYTE, pws->b[12]);
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pwd->b[13] = msa_nloc_df(DF_BYTE, pws->b[13]);
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pwd->b[14] = msa_nloc_df(DF_BYTE, pws->b[14]);
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pwd->b[15] = msa_nloc_df(DF_BYTE, pws->b[15]);
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}
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void helper_msa_nloc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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pwd->h[0] = msa_nloc_df(DF_HALF, pws->h[0]);
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pwd->h[1] = msa_nloc_df(DF_HALF, pws->h[1]);
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pwd->h[2] = msa_nloc_df(DF_HALF, pws->h[2]);
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pwd->h[3] = msa_nloc_df(DF_HALF, pws->h[3]);
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pwd->h[4] = msa_nloc_df(DF_HALF, pws->h[4]);
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pwd->h[5] = msa_nloc_df(DF_HALF, pws->h[5]);
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pwd->h[6] = msa_nloc_df(DF_HALF, pws->h[6]);
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pwd->h[7] = msa_nloc_df(DF_HALF, pws->h[7]);
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}
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void helper_msa_nloc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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pwd->w[0] = msa_nloc_df(DF_WORD, pws->w[0]);
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pwd->w[1] = msa_nloc_df(DF_WORD, pws->w[1]);
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pwd->w[2] = msa_nloc_df(DF_WORD, pws->w[2]);
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pwd->w[3] = msa_nloc_df(DF_WORD, pws->w[3]);
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}
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void helper_msa_nloc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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pwd->d[0] = msa_nloc_df(DF_DOUBLE, pws->d[0]);
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pwd->d[1] = msa_nloc_df(DF_DOUBLE, pws->d[1]);
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}
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void helper_msa_nlzc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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pwd->b[0] = msa_nlzc_df(DF_BYTE, pws->b[0]);
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pwd->b[1] = msa_nlzc_df(DF_BYTE, pws->b[1]);
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pwd->b[2] = msa_nlzc_df(DF_BYTE, pws->b[2]);
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pwd->b[3] = msa_nlzc_df(DF_BYTE, pws->b[3]);
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pwd->b[4] = msa_nlzc_df(DF_BYTE, pws->b[4]);
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pwd->b[5] = msa_nlzc_df(DF_BYTE, pws->b[5]);
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pwd->b[6] = msa_nlzc_df(DF_BYTE, pws->b[6]);
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pwd->b[7] = msa_nlzc_df(DF_BYTE, pws->b[7]);
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pwd->b[8] = msa_nlzc_df(DF_BYTE, pws->b[8]);
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pwd->b[9] = msa_nlzc_df(DF_BYTE, pws->b[9]);
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pwd->b[10] = msa_nlzc_df(DF_BYTE, pws->b[10]);
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pwd->b[11] = msa_nlzc_df(DF_BYTE, pws->b[11]);
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pwd->b[12] = msa_nlzc_df(DF_BYTE, pws->b[12]);
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pwd->b[13] = msa_nlzc_df(DF_BYTE, pws->b[13]);
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pwd->b[14] = msa_nlzc_df(DF_BYTE, pws->b[14]);
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pwd->b[15] = msa_nlzc_df(DF_BYTE, pws->b[15]);
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}
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void helper_msa_nlzc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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pwd->h[0] = msa_nlzc_df(DF_HALF, pws->h[0]);
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pwd->h[1] = msa_nlzc_df(DF_HALF, pws->h[1]);
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pwd->h[2] = msa_nlzc_df(DF_HALF, pws->h[2]);
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pwd->h[3] = msa_nlzc_df(DF_HALF, pws->h[3]);
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pwd->h[4] = msa_nlzc_df(DF_HALF, pws->h[4]);
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pwd->h[5] = msa_nlzc_df(DF_HALF, pws->h[5]);
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pwd->h[6] = msa_nlzc_df(DF_HALF, pws->h[6]);
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pwd->h[7] = msa_nlzc_df(DF_HALF, pws->h[7]);
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}
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void helper_msa_nlzc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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pwd->w[0] = msa_nlzc_df(DF_WORD, pws->w[0]);
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pwd->w[1] = msa_nlzc_df(DF_WORD, pws->w[1]);
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pwd->w[2] = msa_nlzc_df(DF_WORD, pws->w[2]);
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pwd->w[3] = msa_nlzc_df(DF_WORD, pws->w[3]);
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}
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void helper_msa_nlzc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
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{
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wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
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wr_t *pws = &(env->active_fpu.fpr[ws].wr);
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pwd->d[0] = msa_nlzc_df(DF_DOUBLE, pws->d[0]);
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pwd->d[1] = msa_nlzc_df(DF_DOUBLE, pws->d[1]);
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}
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/*
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@ -2524,32 +2664,6 @@ static inline int64_t msa_pcnt_df(uint32_t df, int64_t arg)
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return x;
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}
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static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg)
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{
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uint64_t x, y;
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int n, c;
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x = UNSIGNED(arg, df);
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n = DF_BITS(df);
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c = DF_BITS(df) / 2;
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do {
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y = x >> c;
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if (y != 0) {
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n = n - c;
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x = y;
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}
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c = c >> 1;
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} while (c != 0);
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return n - x;
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}
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static inline int64_t msa_nloc_df(uint32_t df, int64_t arg)
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{
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return msa_nlzc_df(df, UNSIGNED((~arg), df));
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}
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void helper_msa_fill_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
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uint32_t rs)
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{
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@ -2633,8 +2747,6 @@ void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, \
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} \
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}
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MSA_UNOP_DF(nlzc)
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MSA_UNOP_DF(nloc)
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MSA_UNOP_DF(pcnt)
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#undef MSA_UNOP_DF
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@ -28962,10 +28962,36 @@ static void gen_msa_2r(CPUMIPSState *env, DisasContext *ctx)
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gen_helper_msa_pcnt_df(cpu_env, tdf, twd, tws);
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break;
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case OPC_NLOC_df:
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gen_helper_msa_nloc_df(cpu_env, tdf, twd, tws);
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switch (df) {
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case DF_BYTE:
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gen_helper_msa_nloc_b(cpu_env, twd, tws);
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break;
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case DF_HALF:
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gen_helper_msa_nloc_h(cpu_env, twd, tws);
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break;
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case DF_WORD:
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gen_helper_msa_nloc_w(cpu_env, twd, tws);
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break;
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case DF_DOUBLE:
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gen_helper_msa_nloc_d(cpu_env, twd, tws);
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break;
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}
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break;
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case OPC_NLZC_df:
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gen_helper_msa_nlzc_df(cpu_env, tdf, twd, tws);
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switch (df) {
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case DF_BYTE:
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gen_helper_msa_nlzc_b(cpu_env, twd, tws);
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break;
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case DF_HALF:
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gen_helper_msa_nlzc_h(cpu_env, twd, tws);
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break;
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case DF_WORD:
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gen_helper_msa_nlzc_w(cpu_env, twd, tws);
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break;
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case DF_DOUBLE:
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gen_helper_msa_nlzc_d(cpu_env, twd, tws);
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break;
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}
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break;
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default:
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MIPS_INVAL("MSA instruction");
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