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target/mips: msa: Split helpers for <NLOC|NLZC>.<B|H|W|D> 

Achieves clearer code and slightly better performance.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Message-Id: <1569415572-19635-8-git-send-email-aleksandar.markovic@rt-rk.com>
master
Aleksandar Markovic 2019-09-25 14:45:59 +02:00
parent 05aa7e934b
commit 81c4b05995
3 changed files with 181 additions and 33 deletions
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14
target/mips/helper.h
View File

@ -777,6 +777,18 @@ DEF_HELPER_FLAGS_3(wrdsp, 0, void, tl, tl, env)
DEF_HELPER_FLAGS_2(rddsp, 0, tl, tl, env)
/* MIPS SIMD Architecture */
DEF_HELPER_3(msa_nloc_b, void, env, i32, i32)
DEF_HELPER_3(msa_nloc_h, void, env, i32, i32)
DEF_HELPER_3(msa_nloc_w, void, env, i32, i32)
DEF_HELPER_3(msa_nloc_d, void, env, i32, i32)
DEF_HELPER_3(msa_nlzc_b, void, env, i32, i32)
DEF_HELPER_3(msa_nlzc_h, void, env, i32, i32)
DEF_HELPER_3(msa_nlzc_w, void, env, i32, i32)
DEF_HELPER_3(msa_nlzc_d, void, env, i32, i32)
DEF_HELPER_4(msa_andi_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ori_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_nori_b, void, env, i32, i32, i32)
@ -935,8 +947,6 @@ DEF_HELPER_4(msa_bmz_v, void, env, i32, i32, i32)
DEF_HELPER_4(msa_bsel_v, void, env, i32, i32, i32)
DEF_HELPER_4(msa_fill_df, void, env, i32, i32, i32)
DEF_HELPER_4(msa_pcnt_df, void, env, i32, i32, i32)
DEF_HELPER_4(msa_nloc_df, void, env, i32, i32, i32)
DEF_HELPER_4(msa_nlzc_df, void, env, i32, i32, i32)
DEF_HELPER_4(msa_copy_s_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_copy_s_h, void, env, i32, i32, i32)

170
target/mips/msa_helper.c
View File

@ -65,7 +65,147 @@
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Bit Count group helpers here */
static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg)
{
uint64_t x, y;
int n, c;
x = UNSIGNED(arg, df);
n = DF_BITS(df);
c = DF_BITS(df) / 2;
do {
y = x >> c;
if (y != 0) {
n = n - c;
x = y;
}
c = c >> 1;
} while (c != 0);
return n - x;
}
static inline int64_t msa_nloc_df(uint32_t df, int64_t arg)
{
return msa_nlzc_df(df, UNSIGNED((~arg), df));
}
void helper_msa_nloc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
pwd->b[0] = msa_nloc_df(DF_BYTE, pws->b[0]);
pwd->b[1] = msa_nloc_df(DF_BYTE, pws->b[1]);
pwd->b[2] = msa_nloc_df(DF_BYTE, pws->b[2]);
pwd->b[3] = msa_nloc_df(DF_BYTE, pws->b[3]);
pwd->b[4] = msa_nloc_df(DF_BYTE, pws->b[4]);
pwd->b[5] = msa_nloc_df(DF_BYTE, pws->b[5]);
pwd->b[6] = msa_nloc_df(DF_BYTE, pws->b[6]);
pwd->b[7] = msa_nloc_df(DF_BYTE, pws->b[7]);
pwd->b[8] = msa_nloc_df(DF_BYTE, pws->b[8]);
pwd->b[9] = msa_nloc_df(DF_BYTE, pws->b[9]);
pwd->b[10] = msa_nloc_df(DF_BYTE, pws->b[10]);
pwd->b[11] = msa_nloc_df(DF_BYTE, pws->b[11]);
pwd->b[12] = msa_nloc_df(DF_BYTE, pws->b[12]);
pwd->b[13] = msa_nloc_df(DF_BYTE, pws->b[13]);
pwd->b[14] = msa_nloc_df(DF_BYTE, pws->b[14]);
pwd->b[15] = msa_nloc_df(DF_BYTE, pws->b[15]);
}
void helper_msa_nloc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
pwd->h[0] = msa_nloc_df(DF_HALF, pws->h[0]);
pwd->h[1] = msa_nloc_df(DF_HALF, pws->h[1]);
pwd->h[2] = msa_nloc_df(DF_HALF, pws->h[2]);
pwd->h[3] = msa_nloc_df(DF_HALF, pws->h[3]);
pwd->h[4] = msa_nloc_df(DF_HALF, pws->h[4]);
pwd->h[5] = msa_nloc_df(DF_HALF, pws->h[5]);
pwd->h[6] = msa_nloc_df(DF_HALF, pws->h[6]);
pwd->h[7] = msa_nloc_df(DF_HALF, pws->h[7]);
}
void helper_msa_nloc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
pwd->w[0] = msa_nloc_df(DF_WORD, pws->w[0]);
pwd->w[1] = msa_nloc_df(DF_WORD, pws->w[1]);
pwd->w[2] = msa_nloc_df(DF_WORD, pws->w[2]);
pwd->w[3] = msa_nloc_df(DF_WORD, pws->w[3]);
}
void helper_msa_nloc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
pwd->d[0] = msa_nloc_df(DF_DOUBLE, pws->d[0]);
pwd->d[1] = msa_nloc_df(DF_DOUBLE, pws->d[1]);
}
void helper_msa_nlzc_b(CPUMIPSState *env, uint32_t wd, uint32_t ws)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
pwd->b[0] = msa_nlzc_df(DF_BYTE, pws->b[0]);
pwd->b[1] = msa_nlzc_df(DF_BYTE, pws->b[1]);
pwd->b[2] = msa_nlzc_df(DF_BYTE, pws->b[2]);
pwd->b[3] = msa_nlzc_df(DF_BYTE, pws->b[3]);
pwd->b[4] = msa_nlzc_df(DF_BYTE, pws->b[4]);
pwd->b[5] = msa_nlzc_df(DF_BYTE, pws->b[5]);
pwd->b[6] = msa_nlzc_df(DF_BYTE, pws->b[6]);
pwd->b[7] = msa_nlzc_df(DF_BYTE, pws->b[7]);
pwd->b[8] = msa_nlzc_df(DF_BYTE, pws->b[8]);
pwd->b[9] = msa_nlzc_df(DF_BYTE, pws->b[9]);
pwd->b[10] = msa_nlzc_df(DF_BYTE, pws->b[10]);
pwd->b[11] = msa_nlzc_df(DF_BYTE, pws->b[11]);
pwd->b[12] = msa_nlzc_df(DF_BYTE, pws->b[12]);
pwd->b[13] = msa_nlzc_df(DF_BYTE, pws->b[13]);
pwd->b[14] = msa_nlzc_df(DF_BYTE, pws->b[14]);
pwd->b[15] = msa_nlzc_df(DF_BYTE, pws->b[15]);
}
void helper_msa_nlzc_h(CPUMIPSState *env, uint32_t wd, uint32_t ws)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
pwd->h[0] = msa_nlzc_df(DF_HALF, pws->h[0]);
pwd->h[1] = msa_nlzc_df(DF_HALF, pws->h[1]);
pwd->h[2] = msa_nlzc_df(DF_HALF, pws->h[2]);
pwd->h[3] = msa_nlzc_df(DF_HALF, pws->h[3]);
pwd->h[4] = msa_nlzc_df(DF_HALF, pws->h[4]);
pwd->h[5] = msa_nlzc_df(DF_HALF, pws->h[5]);
pwd->h[6] = msa_nlzc_df(DF_HALF, pws->h[6]);
pwd->h[7] = msa_nlzc_df(DF_HALF, pws->h[7]);
}
void helper_msa_nlzc_w(CPUMIPSState *env, uint32_t wd, uint32_t ws)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
pwd->w[0] = msa_nlzc_df(DF_WORD, pws->w[0]);
pwd->w[1] = msa_nlzc_df(DF_WORD, pws->w[1]);
pwd->w[2] = msa_nlzc_df(DF_WORD, pws->w[2]);
pwd->w[3] = msa_nlzc_df(DF_WORD, pws->w[3]);
}
void helper_msa_nlzc_d(CPUMIPSState *env, uint32_t wd, uint32_t ws)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
pwd->d[0] = msa_nlzc_df(DF_DOUBLE, pws->d[0]);
pwd->d[1] = msa_nlzc_df(DF_DOUBLE, pws->d[1]);
}
/*
@ -2524,32 +2664,6 @@ static inline int64_t msa_pcnt_df(uint32_t df, int64_t arg)
return x;
}
static inline int64_t msa_nlzc_df(uint32_t df, int64_t arg)
{
uint64_t x, y;
int n, c;
x = UNSIGNED(arg, df);
n = DF_BITS(df);
c = DF_BITS(df) / 2;
do {
y = x >> c;
if (y != 0) {
n = n - c;
x = y;
}
c = c >> 1;
} while (c != 0);
return n - x;
}
static inline int64_t msa_nloc_df(uint32_t df, int64_t arg)
{
return msa_nlzc_df(df, UNSIGNED((~arg), df));
}
void helper_msa_fill_df(CPUMIPSState *env, uint32_t df, uint32_t wd,
uint32_t rs)
{
@ -2633,8 +2747,6 @@ void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, \
} \
}
MSA_UNOP_DF(nlzc)
MSA_UNOP_DF(nloc)
MSA_UNOP_DF(pcnt)
#undef MSA_UNOP_DF

30
target/mips/translate.c
View File

@ -28962,10 +28962,36 @@ static void gen_msa_2r(CPUMIPSState *env, DisasContext *ctx)
gen_helper_msa_pcnt_df(cpu_env, tdf, twd, tws);
break;
case OPC_NLOC_df:
gen_helper_msa_nloc_df(cpu_env, tdf, twd, tws);
switch (df) {
case DF_BYTE:
gen_helper_msa_nloc_b(cpu_env, twd, tws);
break;
case DF_HALF:
gen_helper_msa_nloc_h(cpu_env, twd, tws);
break;
case DF_WORD:
gen_helper_msa_nloc_w(cpu_env, twd, tws);
break;
case DF_DOUBLE:
gen_helper_msa_nloc_d(cpu_env, twd, tws);
break;
}
break;
case OPC_NLZC_df:
gen_helper_msa_nlzc_df(cpu_env, tdf, twd, tws);
switch (df) {
case DF_BYTE:
gen_helper_msa_nlzc_b(cpu_env, twd, tws);
break;
case DF_HALF:
gen_helper_msa_nlzc_h(cpu_env, twd, tws);
break;
case DF_WORD:
gen_helper_msa_nlzc_w(cpu_env, twd, tws);
break;
case DF_DOUBLE:
gen_helper_msa_nlzc_d(cpu_env, twd, tws);
break;
}
break;
default:
MIPS_INVAL("MSA instruction");