Commit Graph

69368 Commits (11e2bfef799024be4a08fcf6797fe0b22fb16b58)

Author SHA1 Message Date
Richard Henderson 11e2bfef79 tcg/i386: Use MOVDQA for TCG_TYPE_V128 load/store
This instruction raises #GP, aka SIGSEGV, if the effective address
is not aligned to 16-bytes.

We have assertions in tcg-op-gvec.c that the offset from ENV is
aligned, for vector types <= V128.  But the offset itself does not
validate that the final pointer is aligned -- one must also remember
to use the QEMU_ALIGNED() attribute on the vector member within ENV.

PowerPC Altivec has vector load/store instructions that silently
discard the low 4 bits of the address, making alignment mistakes
difficult to discover.  Aid that by making the most popular host
visibly signal the error.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 9e27f58b99 tcg/aarch64: Allow immediates for vector ORR and BIC
The allows immediates to be used for ORR and BIC,
as well as the trivial inversions, ORC and AND.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 02f3a5b474 tcg/aarch64: Build vector immediates with two insns
Use MOVI+ORR or MVNI+BIC in order to build some vector constants,
as opposed to dropping them to the constant pool.  This includes
all 16-bit constants and a similar set of 32-bit constants.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 7e308e003e tcg/aarch64: Use MVNI in tcg_out_dupi_vec
The compliment of a subset of immediates can be computed
with a single instruction.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 984fdcee34 tcg/aarch64: Split up is_fimm
There are several sub-classes of vector immediate, and only MOVI
can use them all.  This will enable usage of MVNI and ORRI, which
use progressively fewer sub-classes.

This patch adds no new functionality, merely splits the function
and moves part of the logic into tcg_out_dupi_vec.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson a9e434a5dc tcg/aarch64: Support vector bitwise select value
The instruction set has 3 insns that perform the same operation,
only varying in which operand must overlap the destination.  We
can represent the operation without overlap and choose based on
the operands seen.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson ebcfb91abe tcg/i386: Use umin/umax in expanding unsigned compare
Using umin(a, b) == a as an expansion for TCG_COND_LEU is a
better alternative to (a - INT_MIN) <= (b - INT_MIN).

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 3ec3538a45 tcg/i386: Remove expansion for missing minmax
This is now handled by code within tcg-op-vec.c.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 904c5e1967 tcg/i386: Support vector comparison select value
We already had backend support for this feature.  Expand the new
cmpsel opcode using vpblendb.  The combination allows us to avoid
an extra NOT for some comparison codes.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 25c012b400 tcg: Add TCG_OPF_NOT_PRESENT if TCG_TARGET_HAS_foo is negative
If INDEX_op_foo is always expanded by tcg_expand_vec_op, then
there may be no reasonable set of constraints to return from
tcg_target_op_def for that opcode.

Let TCG_TARGET_HAS_foo be specified as -1 in that case.  Thus a
boolean test for TCG_TARGET_HAS_foo is true, but we will not
assert within process_op_defs when no constraints are specified.

Compare this with tcg_can_emit_vec_op, which already uses this
tri-state indication.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 72b4c792c7 tcg: Expand vector minmax using cmp+cmpsel
Provide a generic fallback for the min/max operations.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 17f79944eb tcg: Introduce do_op3_nofail for vector expansion
This makes do_op3 match do_op2 in allowing for failure,
and thus fall back expansions.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson f75da2988e tcg: Add support for vector compare select
Perform a per-element conditional move.  This combination operation is
easier to implement on some host vector units than plain cmp+bitsel.
Omit the usual gvec interface, as this is intended to be used by
target-specific gvec expansion call-backs.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 38dc12947e tcg: Add support for vector bitwise select
This operation performs d = (b & a) | (c & ~a), and is present
on a majority of host vector units.  Include gvec expanders.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 532ba368a1 tcg: Fix missing checks and clears in tcg_gen_gvec_dup_mem
The paths through tcg_gen_dup_mem_vec and through MO_128 were
missing the check_size_align.  The path through MO_128 was also
missing the expand_clr.  This last was not visible because the
only user is ARM SVE, which would set oprsz == maxsz, and not
require the clear.

Fix by adding the check_size_align and using do_dup directly
instead of duplicating the check in tcg_gen_gvec_dup_{i32,i64}.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Richard Henderson 7b60ef3264 tcg/i386: Fix dupi/dupm for avx1 and 32-bit hosts
The VBROADCASTSD instruction only allows %ymm registers as destination.
Rather than forcing VEX.L and writing to the entire 256-bit register,
revert to using MOVDDUP with an %xmm register.  This is sufficient for
an avx1 host since we do not support TCG_TYPE_V256 for that case.

Also fix the 32-bit avx2, which should have used VPBROADCASTW.

Fixes: 1e262b49b5
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2019-05-22 15:09:43 -04:00
Peter Maydell a4f667b671 s390x update:
- have the bios tolerate bootmap signature entries
 - next chunk of vector instruction support in tcg
 - a headers update against Linux 5.2-rc1
 - add more facilities and gen15 machines to the cpu model
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Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20190521-3' into staging

s390x update:
- have the bios tolerate bootmap signature entries
- next chunk of vector instruction support in tcg
- a headers update against Linux 5.2-rc1
- add more facilities and gen15 machines to the cpu model

# gpg: Signature made Tue 21 May 2019 16:09:35 BST
# gpg:                using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF
# gpg:                issuer "cohuck@redhat.com"
# gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown]
# gpg:                 aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full]
# gpg:                 aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full]
# gpg:                 aka "Cornelia Huck <cohuck@kernel.org>" [unknown]
# gpg:                 aka "Cornelia Huck <cohuck@redhat.com>" [unknown]
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0  18CE DECF 6B93 C6F0 2FAF

* remotes/cohuck/tags/s390x-20190521-3: (55 commits)
  s390x/cpumodel: wire up 8561 and 8562 as gen15 machines
  s390x/cpumodel: add gen15 defintions
  s390x/cpumodel: add Deflate-conversion facility
  s390x/cpumodel: enhanced sort facility
  s390x/cpumodel: vector enhancements
  s390x/cpumodel: msa9 facility
  s390x/cpumodel: Miscellaneous-Instruction-Extensions Facility 3
  s390x/cpumodel: ignore csske for expansion
  linux headers: update against Linux 5.2-rc1
  update-linux-headers: handle new header file
  s390x/tcg: Implement VECTOR TEST UNDER MASK
  s390x/tcg: Implement VECTOR SUM ACROSS WORD
  s390x/tcg: Implement VECTOR SUM ACROSS QUADWORD
  s390x/tcg: Implement VECTOR SUM ACROSS DOUBLEWORD
  s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW COMPUTE BORROW INDICATION
  s390x/tcg: Implement VECTOR SUBTRACT WITH BORROW INDICATION
  s390x/tcg: Implement VECTOR SUBTRACT COMPUTE BORROW INDICATION
  s390x/tcg: Implement VECTOR SUBTRACT
  s390x/tcg: Implement VECTOR SHIFT RIGHT LOGICAL *
  s390x/tcg: Implement VECTOR SHIFT RIGHT ARITHMETIC
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-21 16:30:13 +01:00
Christian Borntraeger c657e84fae s390x/cpumodel: wire up 8561 and 8562 as gen15 machines
8561 and 8562 will be gen15 machines. There is no name yet, let us use
gen15a and gen15b as base name. Later on we can provide aliases with
the proper name.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <20190429090250.7648-10-borntraeger@de.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-05-21 16:59:16 +02:00
Christian Borntraeger caef62430f s390x/cpumodel: add gen15 defintions
add several new features (msa9, sort, deflate, additional vector
instructions, new general purpose instructions) to generation 15.

Also disable csske and bpb from the default and base models >=15.
This will allow to migrate gen15 machines to future machines that
do not have these features.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <20190429090250.7648-9-borntraeger@de.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-05-21 16:59:16 +02:00
Christian Borntraeger afc7b8666b s390x/cpumodel: add Deflate-conversion facility
add the deflate conversion facility.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <20190429090250.7648-8-borntraeger@de.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-05-21 16:59:16 +02:00
Christian Borntraeger d220fabf16 s390x/cpumodel: enhanced sort facility
add the enhanced sort facility.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20190429090250.7648-7-borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-05-21 16:59:16 +02:00
Christian Borntraeger 54d65de0b5 s390x/cpumodel: vector enhancements
Add vector enhancements to the cpu model.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20190429090250.7648-6-borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-05-21 16:59:16 +02:00
Christian Borntraeger 5dacbe23d2 s390x/cpumodel: msa9 facility
Provide the MSA9 facility (stfle.155). This also contains pckmo
subfunctions for key wrapping. Keep them in a separate group to disable
those as a block if necessary. This is for example needed when disabling
key wrapping via the HMC.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <20190429090250.7648-5-borntraeger@de.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-05-21 16:59:16 +02:00
Christian Borntraeger 2ec038836f s390x/cpumodel: Miscellaneous-Instruction-Extensions Facility 3
Provide the "Miscellaneous-Instruction-Extensions Facility 3" via
stfle.61.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20190429090250.7648-4-borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-05-21 16:59:16 +02:00
Christian Borntraeger eaf6f642ab s390x/cpumodel: ignore csske for expansion
csske will be removed in a future machine. Ignore it for expanding the
cpu model. Otherwise qemu falls back to z9.

Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: qemu-stable@nongnu.org
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20190429090250.7648-3-borntraeger@de.ibm.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-05-21 16:59:16 +02:00
Cornelia Huck d9cb433615 linux headers: update against Linux 5.2-rc1
commit a188339ca5a396acc588e5851ed7e19f66b0ebd9

Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-05-21 16:58:56 +02:00
Cornelia Huck b1b9e0dc78 update-linux-headers: handle new header file
We need to copy sve_context.h for aarch64.

Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-05-21 16:56:30 +02:00
Peter Maydell 247ba27c52 pci, pc, virtio: features, fixes
reconnect for vhost blk
 tests for UEFI
 misc other stuff
 
 Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging

pci, pc, virtio: features, fixes

reconnect for vhost blk
tests for UEFI
misc other stuff

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# gpg: Signature made Tue 21 May 2019 14:41:32 BST
# gpg:                using RSA key 281F0DB8D28D5469
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [full]
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* remotes/mst/tags/for_upstream: (34 commits)
  tests: acpi: print error unable to dump ACPI table during rebuild
  tests: acpi: refactor rebuild-expected-aml.sh to dump ACPI tables for a specified list of targets
  tests: acpi: allow to override default accelerator
  tests: acpi: ignore SMBIOS tests when UEFI firmware is used
  tests: acpi: add a way to start tests with UEFI firmware
  tests: acpi: add acpi_find_rsdp_address_uefi() helper
  tests: acpi: move boot_sector_init() into x86 tests branch
  tests: acpi: skip FACS table if board uses hw reduced ACPI profile
  tests: acpi: fetch X_DSDT if pointer to DSDT is 0
  tests: acpi: make pointer to RSDP 64bit
  tests: acpi: make RSDT test routine handle XSDT
  tests: acpi: make acpi_fetch_table() take size of fetched table pointer
  tests: acpi: rename acpi_parse_rsdp_table() into acpi_fetch_rsdp_table()
  pci: Simplify pci_bus_is_root()
  pcie: Remove redundant test in pcie_mmcfg_data_{read,write}()
  libvhost-user: fix bad vu_log_write
  hw/arm/virt-acpi-build: pass AcpiMcfgInfo to build_mcfg()
  i386, acpi: remove mcfg_ prefix in AcpiMcfgInfo members
  hw/arm/virt-acpi-build: remove unnecessary variable mcfg_start
  do not call vhost_net_cleanup() on running net from char user event
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-21 14:56:57 +01:00
Igor Mammedov ba02ff90ee tests: acpi: print error unable to dump ACPI table during rebuild
Instead of just asserting print the error that lead to assert first.
While at it move assert into rebuild branch, which removes redundant
check done in case of !rebuild branch is taken (the later is taken
care of by g_assert_no_error).

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Wei Yang <richardw.yang@linux.intel.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <1556808723-226478-16-git-send-email-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-05-21 09:30:57 -04:00
Igor Mammedov ae3c12a015 tests: acpi: refactor rebuild-expected-aml.sh to dump ACPI tables for a specified list of targets
Make initial list contain x86_64.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <1556808723-226478-15-git-send-email-imammedo@redhat.com>
Reviewed-by: Wei Yang <richardw.yang@linux.intel.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-05-21 09:30:44 -04:00
Peter Maydell 62516a0a18 - qtest patches to get rid of the global_qtest variable in more tests
- some iotests patches that have multiple reviews and thus are ready to go
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Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2019-05-21' into staging

- qtest patches to get rid of the global_qtest variable in more tests
- some iotests patches that have multiple reviews and thus are ready to go

# gpg: Signature made Tue 21 May 2019 11:40:31 BST
# gpg:                using RSA key 2ED9D774FE702DB5
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* remotes/huth-gitlab/tags/pull-request-2019-05-21:
  tests/qemu-iotests: Remove the "_supported_os Linux" line from many tests
  cirrus / travis: Add gnu-sed and bash for macOS and FreeBSD
  tests/qemu-iotests: Do not hard-code the path to bash
  tests/qemu-iotests/check: Pick a default machine if necessary
  tests/qemu-iotests/005: Add a sanity check for large sparse file support
  tests/hd-geo-test: Use qtest_init() instead of qtest_start()
  tests/device-introspect: Use qtest_init() instead of qtest_start()
  tests/qom-test: Use qtest_init() instead of qtest_start()
  tests/numa-test: Use qtest_init() instead of qtest_start()
  tests/q35-test: Make test independent of global_qtest
  tests/libqos: Get rid of global_qtest dependency in qvring_init()
  tests/libqtest: Fix description of qtest_vinitf() and qtest_initf()
  tests/libqtest: Remove unused global_qtest-related wrapper functions

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-21 14:24:26 +01:00
Peter Maydell 293c76cb48 target/xtensa: SR reorganization and options for modern cores
Reorganize special register handling to support configurations with
 conflicting SR definitions.
 
 Implement options used by the modern xtensa cores:
 - memory protection unit;
 - block prefetch;
 - exclusive access
 
 Add special register definitions and IRQ types for ECC/parity,
 gather/scatter and IDMA.
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Merge remote-tracking branch 'remotes/xtensa/tags/20190520-xtensa' into staging

target/xtensa: SR reorganization and options for modern cores

Reorganize special register handling to support configurations with
conflicting SR definitions.

Implement options used by the modern xtensa cores:
- memory protection unit;
- block prefetch;
- exclusive access

Add special register definitions and IRQ types for ECC/parity,
gather/scatter and IDMA.

# gpg: Signature made Mon 20 May 2019 18:53:05 BST
# gpg:                using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg:                issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>" [full]
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20190520-xtensa:
  target/xtensa: implement exclusive access option
  target/xtensa: update list of exception causes
  target/xtensa: implement block prefetch option opcodes
  target/xtensa: implement DIWBUI.P opcode
  target/xtensa: implement MPU option
  target/xtensa: add parity/ECC option SRs
  target/xtensa: define IDMA and gather/scatter IRQ types
  target/xtensa: make internal MMU functions static
  target/xtensa: get rid of centralized SR properties

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-05-21 10:44:21 +01:00
Thomas Huth b3763a195c tests/qemu-iotests: Remove the "_supported_os Linux" line from many tests
A lot of tests run fine on FreeBSD and macOS, too - the limitation
to Linux here was likely just copied-and-pasted from other tests.
Thus remove the "_supported_os Linux" line from tests that run
successful in our CI pipelines on FreeBSD and macOS.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <20190502084506.8009-6-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 10:13:58 +02:00
Thomas Huth db2b95d564 cirrus / travis: Add gnu-sed and bash for macOS and FreeBSD
We are going to enable the qemu-iotests during "make check" again,
and for running the iotests, we need bash and gnu-sed.

Reviewed-by: Li-Wen Hsu <lwhsu@freebsd.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <20190502084506.8009-5-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 10:12:47 +02:00
Thomas Huth f3d07ce8f4 tests/qemu-iotests: Do not hard-code the path to bash
bash is installed in a different directory on non-Linux systems like
FreeBSD. Do not hard-code /bin/bash here so that the tests can run
there, too.

Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <20190502084506.8009-4-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 10:10:33 +02:00
Thomas Huth 4a715461c8 tests/qemu-iotests/check: Pick a default machine if necessary
qemu-system-arm, qemu-system-aarch64 and qemu-system-tricore do not have
a default machine, so when running the qemu-iotests with such a binary,
lots of tests are failing. Fix it by picking a default machine in the
"check" script instead.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Christian Borntraeger <borntraeger@de.ibm.com>
Message-Id: <20190502084506.8009-3-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 10:07:29 +02:00
Thomas Huth b807a99369 tests/qemu-iotests/005: Add a sanity check for large sparse file support
"check -raw 005" fails when running on certain filesystems - these do not
support such large sparse files. Use the same check as in test 220 to
skip the test in this case.

Suggested-by: Eric Blake <eblake@redhat.com>
Message-Id: <20190502084506.8009-2-thuth@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 10:05:21 +02:00
Thomas Huth 44c2364aaa tests/hd-geo-test: Use qtest_init() instead of qtest_start()
qtest_start() + qtest_end() should be avoided, since they use the
global_qtest variable that we want to get rid of in the long run.
Use qtest_init() and qtest_quit() instead.

Message-Id: <20190515174328.16361-7-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 10:00:46 +02:00
Thomas Huth 39fb795a87 tests/device-introspect: Use qtest_init() instead of qtest_start()
qtest_start() + qtest_end() should be avoided, since they use the
global_qtest variable that we want to get rid of in the long run.
Use qtest_init() and qtest_quit() instead.

Message-Id: <20190515174328.16361-6-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 10:00:41 +02:00
Thomas Huth 9266ebc97b tests/qom-test: Use qtest_init() instead of qtest_start()
qtest_start() + qtest_end() should be avoided, since they use the
global_qtest variable that we want to get rid of in the long run.
Use qtest_init() and qtest_quit() instead.

Message-Id: <20190515174328.16361-5-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 10:00:37 +02:00
Thomas Huth 3d5e7087bd tests/numa-test: Use qtest_init() instead of qtest_start()
qtest_start() + qtest_end() should be avoided, since they use the
global_qtest variable that we want to get rid of in the long run.
Use qtest_init() and qtest_quit() instead.

Message-Id: <20190515174328.16361-4-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 10:00:32 +02:00
Thomas Huth 41e99cbef8 tests/q35-test: Make test independent of global_qtest
Use a local QTestState variable, so that we can finally get rid
of the undesired global_qtest variable in this file, too.

Message-Id: <20190515174328.16361-3-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 10:00:27 +02:00
Thomas Huth 8b898f59b1 tests/libqos: Get rid of global_qtest dependency in qvring_init()
Library functions should not depend on global_qtest functions like
writew() and writeq(), so that they can also be used in tests that
deal with multiple QTestStates at the same time (like migration tests).

Message-Id: <20190515174328.16361-2-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 10:00:22 +02:00
Thomas Huth 00825d964a tests/libqtest: Fix description of qtest_vinitf() and qtest_initf()
These functions are convenience wrappers of qtest_init() and not of
qtest_start().

Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190513154759.24973-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 09:57:56 +02:00
Thomas Huth 1f0396db38 tests/libqtest: Remove unused global_qtest-related wrapper functions
A bunch of the wrapper functions that use global_qtest are not used
anymore. Remove them to avoid that they are used in new code again.

Reviewed-by: Eric Blake <eblake@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20190510052239.21947-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
2019-05-21 09:57:45 +02:00
Igor Mammedov 3dc018749d tests: acpi: allow to override default accelerator
By default test cases were run with 'kvm:tcg' accelerators to speed up
tests execution. While it works for x86, were change of accelerator
doesn't affect ACPI tables, the approach doesn't works for ARM usecase
though.

In arm/virt case, KVM mode requires using 'host' cpu model, which
isn't available in TCG mode. That could be worked around with 'max'
cpu model, which works both for KVM and TCG. However in KVM mode it
is necessary to specify matching GIC version, which also could use
'max' value to automatically pick GIC version suitable for host's CPU.
Depending on host cpu type, different GIC versions would be used,
which in turn leads to different ACPI tables (APIC) generated.
As result while comparing with reference blobs, test would fail if
host's GIC version won't match the version on the host where
reference blobs where generated.

Let's keep testing simple for now and allow ARM tests run in TCG only
mode. To do so introduce 'accel' parameter in test configuration, so
test case could override default "kvm:tcg" with accelerator of choice.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <1556808723-226478-12-git-send-email-imammedo@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-05-20 18:40:02 -04:00
Igor Mammedov ce513b4615 tests: acpi: ignore SMBIOS tests when UEFI firmware is used
once FW provides a pointer to SMBIOS entry point like it does for
RSDP it should be possible to enable this one the same way.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <1556808723-226478-11-git-send-email-imammedo@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-05-20 18:40:02 -04:00
Igor Mammedov 97256e799f tests: acpi: add a way to start tests with UEFI firmware
For testcase to use UEFI firmware, one needs to provide and specify
firmware and varstore blob names in test_data { uefi_fl1, uefi_fl2 }
fields respectively and RAM start address plus size where to look for
test structure signature. Additionally testcase should specify
bootable cdrom image from uefi-boot-images with EFI test utility.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <1556808723-226478-10-git-send-email-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-05-20 18:40:02 -04:00
Igor Mammedov a37d5472b3 tests: acpi: add acpi_find_rsdp_address_uefi() helper
introduce UEFI specific counterpart to acpi_find_rsdp_address()
that will help to find RSDP address when [OA]VMF is used as
firmware. It requires guest firmware or other guest app to place
1Mb aligned UefiTestSupport structure (defined in this patch)
in RAM with UefiTestSupport::signature_guid set to
AB87A6B1-2034-BDA0-71BD-375007757785
For test app details see commit
  (09a274d82f tests: introduce "uefi-test-tools" with the BiosTablesTest UEFI app)

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Wei Yang <richardw.yang@linux.intel.com>
Message-Id: <1556808723-226478-9-git-send-email-imammedo@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-05-20 18:40:02 -04:00
Igor Mammedov d47a5d6445 tests: acpi: move boot_sector_init() into x86 tests branch
boot_sector_init() won't be used by arm/virt board, so move it from
global scope to x86 branch that uses it.

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <1556808723-226478-8-git-send-email-imammedo@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2019-05-20 18:40:02 -04:00