mirror_qemu/target/ppc
Frederic Barrat 609b1c8669 target/ppc: cpu_init: Clean up stop state on cpu reset
The 'resume_as_sreset' attribute of a cpu is set when a thread is
entering a stop state on ppc books. It causes the thread to be
re-routed to vector 0x100 when woken up by an exception. So it must be
cleared on reset or a thread might be re-routed unexpectedly after a
reset, when it was not in a stop state and/or when the appropriate
exception handler isn't set up yet.

Using skiboot, it can be tested by resetting the system when it is
quiet and most threads are idle and in stop state.

After the reset occurs, skiboot elects a primary thread and all the
others wait in secondary_wait. The primary thread does all the system
initialization from main_cpu_entry() and at some point, the
decrementer interrupt starts ticking. The exception vector for the
decrementer interrupt is in place, so that shouldn't be a
problem. However, if that primary thread was in stop state prior to
the reset, and because the resume_as_sreset parameters is still set,
it is re-routed to exception vector 0x100. Which, at that time, is
still defined as the entry point for BML. So that primary thread
restarts as new and ends up being treated like any other secondary
thread. All threads are now waiting in secondary_wait.

It results in a full system hang with no message on the console, as
the uart hasn't been init'ed yet. It's actually not obvious to realise
what's happening if not tracing reset (-d cpu_reset). The fix is
simply to clear the 'resume_as_sreset' attribute on reset.

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220617095222.612212-1-fbarrat@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20 08:38:59 -03:00
..
translate target/ppc: Implemented vector module quadword 2022-06-20 08:38:58 -03:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
arch_dump.c Replace config-time define HOST_WORDS_BIGENDIAN 2022-04-06 10:50:37 +02:00
compat.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
cpu-models.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
cpu-models.h target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu.c target/ppc: Remove fpscr_* macros from cpu.h 2022-05-05 15:36:17 -03:00
cpu.h target/ppc: Implemented xvf16ger* 2022-05-26 17:11:33 -03:00
cpu_init.c target/ppc: cpu_init: Clean up stop state on cpu reset 2022-06-20 08:38:59 -03:00
dfp_helper.c target/ppc: Move ddedpd[q],denbcd[q],dscli[q],dscri[q] to decodetree 2021-11-09 10:32:52 +11:00
excp_helper.c target/ppc: Remove msr_hv macro 2022-05-05 15:36:17 -03:00
fpu_helper.c target/ppc: fix unreachable code in fpu_helper.c 2022-06-20 08:38:58 -03:00
gdbstub.c target/ppc: Remove msr_le macro 2022-05-05 15:36:17 -03:00
helper.h target/ppc: Implemented vector module quadword 2022-06-20 08:38:58 -03:00
helper_regs.c target/ppc: Fix tlbie 2022-05-26 17:11:32 -03:00
helper_regs.h target/ppc: Remove env->immu_idx and env->dmmu_idx 2021-05-04 11:41:25 +10:00
insn32.decode target/ppc: Implemented vector module quadword 2022-06-20 08:38:58 -03:00
insn64.decode target/ppc: Implemented [pm]xvbf16ger2* 2022-05-26 17:11:33 -03:00
int_helper.c target/ppc: avoid int32 multiply overflow in int_helper.c 2022-06-20 08:38:58 -03:00
internal.h target/ppc: Implemented xvi*ger* instructions 2022-05-26 17:11:33 -03:00
kvm-stub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
kvm.c target/ppc: Remove msr_ts macro 2022-05-05 15:36:17 -03:00
kvm_ppc.h target/ppc: Support for H_RPT_INVALIDATE hcall 2021-07-09 11:01:06 +10:00
machine.c target/ppc: Implement lwsync with weaker memory ordering 2022-05-26 17:11:33 -03:00
mem_helper.c target/ppc: Remove msr_hv macro 2022-05-05 15:36:17 -03:00
meson.build target/ppc: make power8-pmu.c CONFIG_TCG only 2022-03-02 06:51:36 +01:00
misc_helper.c target/ppc: Remove msr_hv macro 2022-05-05 15:36:17 -03:00
mmu-book3s-v3.c target/ppc: Introduce ppc_xlate 2021-07-09 10:38:19 +10:00
mmu-book3s-v3.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-books.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-hash32.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mmu-hash32.h target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mmu-hash64.c target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-hash64.h target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-radix64.c target/ppc: Remove msr_hv macro 2022-05-05 15:36:17 -03:00
mmu-radix64.h target/ppc: Check effective address validity 2022-01-04 07:55:34 +01:00
mmu_common.c target/ppc: Remove msr_dr macro 2022-05-05 15:36:17 -03:00
mmu_helper.c target/ppc: Remove msr_cm macro 2022-05-05 15:36:17 -03:00
monitor.c target/ppc: Fix XER access in monitor 2021-10-21 11:42:47 +11:00
power8-pmu-regs.c.inc target/ppc: enable PMU instruction count 2021-12-17 17:57:18 +01:00
power8-pmu.c target/ppc: trigger PERFM EBBs from power8-pmu.c 2022-03-02 06:51:36 +01:00
power8-pmu.h Clean up ill-advised or unusual header guards 2022-05-11 16:50:01 +02:00
spr_common.h target/ppc: Move common SPR functions out of cpu_init 2022-02-18 08:34:15 +01:00
tcg-stub.c target/ppc: created tcg-stub.c file 2021-06-03 13:22:06 +10:00
timebase_helper.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
trace-events target/ppc: Improve KVM hypercall trace 2022-04-20 18:00:30 -03:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate.c target/ppc: Implement lwsync with weaker memory ordering 2022-05-26 17:11:33 -03:00
user_only_helper.c target/ppc: Implement ppc_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00